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AM3359 Datasheet(PDF) 144 Page - Texas Instruments |
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AM3359 Datasheet(HTML) 144 Page - Texas Instruments |
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144 / 256 page ![]() 144 AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351 SPRS717L – OCTOBER 2011 – REVISED MARCH 2020 www.ti.com Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351 Peripheral Information and Timings Copyright © 2011–2020, Texas Instruments Incorporated 7.7.1.3 GPMC and NAND Flash—Asynchronous Mode Table 7-30 and Table 7-31 assume testing over the recommended operating conditions and electrical characteristic conditions shown in Table 7-29 (see Figure 7-28 through Figure 7-31). Table 7-29. GPMC and NAND Flash Timing Conditions—Asynchronous Mode PARAMETER MIN TYP MAX UNIT Input Conditions tR Input signal rise time 1 5 ns tF Input signal fall time 1 5 ns Output Condition CLOAD Output load capacitance 3 30 pF Table 7-30. GPMC and NAND Flash Internal Timing Requirements—Asynchronous Mode(1)(2) NO. OPP100 OPP50 UNIT MIN MAX MIN MAX GNFI1 Delay time, output data gpmc_ad[15:0] generation from internal functional clock GPMC_FCLK(3) 6.5 6.5 ns GNFI2 Delay time, input data gpmc_ad[15:0] capture from internal functional clock GPMC_FCLK(3) 4.0 4.0 ns GNFI3 Delay time, output chip select gpmc_csn[x] generation from internal functional clock GPMC_FCLK(3) 6.5 6.5 ns GNFI4 Delay time, output address valid and address latch enable gpmc_advn_ale generation from internal functional clock GPMC_FCLK(3) 6.5 6.5 ns GNFI5 Delay time, output lower-byte enable and command latch enable gpmc_be0n_cle generation from internal functional clock GPMC_FCLK(3) 6.5 6.5 ns GNFI6 Delay time, output enable gpmc_oen generation from internal functional clock GPMC_FCLK(3) 6.5 6.5 ns GNFI7 Delay time, output write enable gpmc_wen generation from internal functional clock GPMC_FCLK(3) 6.5 6.5 ns GNFI8 Skew, functional clock GPMC_FCLK(3) 100 100 ps (1) Internal parameters table must be used to calculate data access time stored in the corresponding CS register bit field. (2) Internal parameters are referred to the GPMC functional internal clock which is not provided externally. (3) GPMC_FCLK is general-purpose memory controller internal functional clock. Table 7-31. GPMC and NAND Flash Timing Requirements—Asynchronous Mode NO. OPP100 OPP50 UNIT MIN MAX MIN MAX GNF12(1) tacc(d) Access time, input data gpmc_ad[15:0] J(2) J(2) ns (1) The GNF12 parameter illustrates the amount of time required to internally sample input data. It is expressed in number of GPMC functional clock cycles. From start of the read cycle and after GNF12 functional clock cycles, input data is internally sampled by the active functional clock edge. The GNF12 value must be stored inside AccessTime register bit field. (2) J = AccessTime × (TimeParaGranularity + 1) × GPMC_FCLK(3) (3) GPMC_FCLK is general-purpose memory controller internal functional clock period in ns. |
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