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PM4328 Datasheet(PDF) 21 Page - PMC-Sierra, Inc |
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PM4328 Datasheet(HTML) 21 Page - PMC-Sierra, Inc |
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21 / 250 page ![]() STANDARD PRODUCT PM4328 TECT3 DATASHEET PMC-2011596 ISSUE 1 HIGH DENSITY T1/E1 FRAMER AND M13 MULTIPLEXER PROPRIETARY AND CONFIDENTIAL 8 repeating pattern up to 32 bits. The test pattern can be framed or unframed. Diagnostic abilities include single bit error insertion or error insertion at bit error rates ranging from 10-1 to 10-7. M23 Multiplexer Section: · Multiplexes 7 DS2 bit streams into a single M23 format DS3 bit stream. · Performs required bit stuffing/destuffing including generation and interpretation of C-bits. · Includes required FIFO buffers for rate adaptation in the multiplex path. · Allows insertion and detection of per DS2 payload loopback requests encoded in the C-bits to be activated under microprocessor control. · Internally generates DS2 clock for use in integrated M13 or C-bit parity multiplex applications. Alternatively accepts external DS2 clock reference. · Allows per DS2 alarm indication signal (AIS) to be activated or cleared for either direction under microprocessor control. · Allows DS2 alarm indication signal (AIS) to be activated or cleared in the demultiplex direction automatically upon loss of DS3 frame alignment or signal. · Supports C-bit parity DS3 format. DS2 Framer Section: · Frames to a DS2 (ANSI T1.107 section 8) signal with a maximum average reframe time of less than 7 ms (as required by TR-TSY-000009 Section 4.1.2 and TR-TSY-000191 Section 5.2). · Detects the DS2 alarm indication signal (AIS) in 9.9 ms in the presence of a 10-3 bit error rate. · Extracts the DS2 X-bit remote alarm indication (RAI) bit and indicates far end receive failure (FERF). · Accumulates up to 255 DS2 M-bit or F-bit error events per second. |
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