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TPS3423 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS3423 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 26 page ![]() 6.7 Timing Diagrams VDDMIN VDD INT RESET (Active high , Latched) ttSPt ttLPt ttSINTt Ignore ttSPt ttSINTt ttLINTt Ignore PB input is ignored if it is released and again pressed during - Interrupt pulse PB (Active Low) Figure 6-1. Timing Diagram: Latched RESET VDDMIN VDD INT RESET ttSPt ttSINTt -No Interrupt pulse for second press during INT pulse PB (Active Low) ttSPt Figure 6-2. Timing Diagram: Example of PB Input Ignore www.ti.com TPS3423, TPS3424 SNVSCN9 – SEPTEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TPS3423 TPS3424 |
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