PM7344 datasheet(200/293 Pages) PMC

200 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

184

Registers 071H, 171H, 271H and 371H: RXCP Framing Control

Bit

Type

Function

Default

Bit 7

R/W

REMPTY4

Bit 6

R/W

LCDE

Bit 5

LCDI

Bit 4

LCD

Bit 3

R/W

FIXPAT

Bit 2

R/W

DETHYST[1]

Bit 1

R/W

DETHYST[0]

Bit 0

R/W

Reserved

RESERVED:

The Reserved bit can be programmed to either 1 or 0.

DETHYST[1:0]:

The DETHYST[1:0] bits control the cell acceptance threshold after an HCS

error is detected. This feature is enabled when the HCSPASS bit in the

RXCP Control Register is written with a logic 0. Upon detecting an HCS

error, cells continue to be dropped until a number of consecutive cells are

received that contain no HCS errors. The number of consecutive cells is

indicated below:

DETHYST[1:0]

Cell Acceptance Threshold

The first cell containing an error-free HCS

The second consecutive cell containing no

HCS errors.

The fourth consecutive cell containing no

HCS errors.

The eighth consecutive cell containing no

HCS errors.

FIXPAT:

The FIXPAT bit enables the insertion of a fixed 55H pattern into the HCS

when the FIFO data path integrity check is enabled by the HCK bit in the

RXCP Control register. When FIXPAT is logic 1, the pattern forced into the

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