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PM7350-PI Datasheet(PDF) 53 Page - PMC-Sierra, Inc |
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PM7350-PI Datasheet(HTML) 53 Page - PMC-Sierra, Inc |
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53 / 241 page ![]() RELEASED PM7350 S/UNI-DUPLEX DATA SHEET PMC-1980581 ISSUE 5 DUAL SERIAL LINK PHY MULTIPLEXER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 41 Ball Name Type Ball No. Function High Speed LVDS Links TRSTB Input A13 The active-low test reset (TRSTB) signal provides an asynchronous S/UNI-DUPLEX test access port reset via the IEEE P1149.1 test access port. TRSTB is a Schmitt triggered input with an integral pull-up resistor. Note that when not being used, TRSTB must be connected to the RSTB input. Power and Ground BIAS Power A7 When tied to +5V, the BIAS input is used to bias the wells in the input and I/O pads so that the pads can tolerate 5V on their inputs without forward biasing internal ESD protection devices. When tied to +3.3V, the inputs and bi-directional inputs will only tolerate 3.3V level inputs. VDD Power B3 C5 C13 D10 E2 E14 F3 K1 L1 L4 L9 M7 M12 N3 N13 P6 The digital power (VDD) pins should be connected to a well-decoupled +3.3 V DC supply. |
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