| Electronic Components Datasheet Search |
|
PM7350-PI Datasheet(PDF) 64 Page - PMC-Sierra, Inc |
|
|
|||||||||||||||||||||||||||||
PM7350-PI Datasheet(HTML) 64 Page - PMC-Sierra, Inc |
|
64 / 241 page ![]() RELEASED PM7350 S/UNI-DUPLEX DATA SHEET PMC-1980581 ISSUE 5 DUAL SERIAL LINK PHY MULTIPLEXER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 52 Table 9 Sixteen Bit SCI-PHY/Utopia Bus Slave, Output Configuration Word Register 0x14 # bytes 01 4 INADD UDF H5 UDF PRE LEN Notes 52 N N N 0 0 00 H1-H4 only, no PHY ID 54 N N Y 0 1 00 Default, Utopia compatible, no PHY ID 54 N Y N 0 0 01 2 user bytes, H1-H4, no PHY ID 56 N Y Y 0 1 01 2 user bytes, H1-H4, H5/UDF, no PHY ID 54 N N Y 1 X 00 Most common setting when Utopia compatibility is desired. Standard 54 byte cell, PHY ID embedded in H5/UDF. 56 N Y Y 1 X 01 2 user bytes, H1-H4, PHY ID in H5/UDF 9.1.3 Any-PHY Slave The Any-PHY bus slave format is enabled when the IANYPHY and OANYPHY inputs are high, and IMASTER, and OMASTER inputs are all tied low. In the ingress direction (cells are transferred from the parallel bus input port to the LVDS links), the port presents itself as 32 PHY entities. Cells read from the bus are queued in a dedicated FIFO for each logical channel. As in the SCI-PHY bus mode, the ability of the FIFOs to accept additional cells is discovered through polling using the IADDR[4:0] and IAVALID inputs. Upon IAVALID being sampled low (note this is opposite to SCI-PHY mode) the ICA output is asserted if the cell FIFO for the logical channel addressed by IADDR[4:0] has at least one empty cell buffer. If the FIFO is full, ICA is deasserted. If a cell transfer is in progress that will fill a logical channel FIFO, ICA will also be deasserted. If IAVALID is sampled high ICA becomes high impedance. ICA is delayed by one bus cycle (i.e. one IFCLK cycle) in the Any-PHY bus configuration. In Any-PHY mode cell transfer is initiated using inband selection. The first word of the cell, coincident with the assertion of the ISX signal, is used for logical channel selection. Cells are accepted by the S/UNI-DUPLEX if the value in the Extended Address field of Word 0 agrees with the Extended Address Match registers over the range of bits specified by the Extended Address Mask registers. Table 10 summarizes the distinctions between the SCI-PHY/Utopia and Any-PHY protocols in the ingress direction. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |