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VR5510 Datasheet(PDF) 40 Page - NXP Semiconductors |
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VR5510 Datasheet(HTML) 40 Page - NXP Semiconductors |
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40 / 200 page ![]() NXP Semiconductors VR5510 Multi-output PMIC with SMPS and LDO 14.2 Application schematics aaa-039379 I2C INTERFACE VLDO1_EN LDO1_IN VLDO1 CIN_LDO1 COUT_LDO1 VLDO1_IN discharge VREF VLDO1 Figure 20. LDO1 block diagram 14.3 Electrical characteristics TA = –40 °C to 125 °C, unless otherwise specified. VSUP = VSUP_UVH to 36 V, unless otherwise specified. All voltages referenced to ground. Typical values based on TA = 25 °C. Symbol Parameter Min Typ Max Unit LDO1 VLDO1_IN Input voltage range 2.5 — 6.5 V VLDO1 Output voltage, OTP settings available: 1.1 V, 1.2 V, 1.6 V, 1.8 V, 2.5 V, 2.8 V, 3.3 V, 5.0 V 1.1 — 5.0 V VLDO1_ACC Output Voltage accuracy -2 — +2 % VLDO1_DROP_150 Minimum Voltage drop for 150 mA current capability 0.5 — — V VLDO1_DROP_400 Minimum Voltage drop for 400 mA current capability 1.0 — — V ILDO1_Q Quiescent Current, No load, VSUP = 12 V — 40 — μA CIN_LDO1 Effective input capacitor (close to LDO1_IN pin) 0.5 — — μF COUT_LDO1_150 Effective output capacitor, 150 mA current capability 3 — 100 μF COUT_LDO1_400 Effective output capacitor, 400 mA current capability 4.5 — 100 μF COUT_LDO1 Output decoupling capacitor 0.1 — — μF VLDO1_LTR_150 Transient Load Regulation (from 10 mA to 150 mA in 2 μs) -4 — +4 % VLDO1_LTR_400 Transient Load Regulation (from 10 mA to 400 mA in 4 μs) -5 — +5 % VLDO1_LR Line Regulation — — 0.5 % VLDO1_ILIM_150 Current limitation, 150 mA current capability 180 280 500 mA VLDO1_ILIM_400 Current limitation, 400 mA current capability 460 560 850 mA Table 21. Electrical characteristics VR5510 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 2 October 2024 Document feedback 40 / 200 |
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