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TMC9660 Datasheet(PDF) 42 Page - Analog Devices |
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TMC9660 Datasheet(HTML) 42 Page - Analog Devices |
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42 / 101 page ![]() TMC9660 70V Smart Gate Driver with Servo (FOC) Controller in HW and Buck Converter www.analog.com Analog Devices | 42 ������������������������������ = ������������������������ × ������������ where QG is the total gate charge and fPWM is the chopping frequency. Since the doubler, which generates the drive voltage supply (VDRV), is capable of up to 50mA, the following relation must be satisfied: ������ × ������������������������ × ������������ ≤ 50������������ where N is the total number of external FETs (in particular N = 6 for three-phase BLDC/PMSM motors and N = 8 for two-phase steppers). For example, when driving a BLDC motor (N = 6) at fPWM = 25kHz, the Equivalent Total Gate Charge must be less than 300nC. Integrated active and passive pull-down resistors avoid crossbar conduction of the external half-bridge when the gate driver outputs are three-stated or when the part is in low-power mode. No external pull-down resistors are needed. 600mA BUCK 5.8V OUT 0.68MHz LS CHARGE PUMP DOUBLER 50mA VDRV CPI CPO VSA SW VBUCK TRICKLE CHARGE PUMP BOOSTRAP SWITCH HS 12kΩ CBST VS LS 12kΩ 150kΩ BS_X HS_X BM_X LS_X CSP_X GATE DRIVER CONTROLLER SLOPE CONTROL AND SEQUENCER TMC9660 VS VS VSA CURRENT LIMITER CSN_X Figure 20. Gate Driver Topology Showing One Half-Bridge Slew Rate Control The gate driver output currents are user programmable to enable slope control of the motor phase voltages. This eliminates the external gate resistors which are commonly used for this purpose. Moreover, source and sink currents can be independently configured for maximum flexibility. |
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