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TMC9660 Datasheet(PDF) 24 Page - Analog Devices |
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TMC9660 Datasheet(HTML) 24 Page - Analog Devices |
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24 / 101 page  TMC9660 70V Smart Gate Driver with Servo (FOC) Controller in HW and Buck Converter www.analog.com Analog Devices | 24 19200* 130 3 260 3 38400* 65 1 130 1 57600* 43 6 86 6 115200* 21 11 43 3 230400* 10 13 21 5 250000* 10 0 20 0 460800 5 6 10 6 500000 5 0 10 0 921600 2 11 5 3 1000000 2 8 5 0 2000000 1 4 2 4 2500000 1 0 2 0 4000000 - - 1 2 5000000 - - 1 0 *Automatic baud rate detection supported with 40MHz system clock UART bidirectional communication requires a minimum of two pins: receive data in (UART_RX) and transmit data out (UART_TX). Serial data is transmitted and received through these pins during communication. After initial power-on, the bootloader configures Pin 63 as UART_RX instead of GPIO7 and the UART listens for incoming messages. Idle state for UART communication is expected to be “1.” One communication frame always comprises a start bit (“0”), 8 bits of data (LSB first), and one stop bit (“1”). For communication with the bootloader command and reply, messages always comprise 8 communication frames/bytes. The bootloader configures the UART block with autobaud switched on. As first character of a command message, 0x55 is expected. This pattern is used for baud rate detection. Next characters are the device address (configurable), one command byte, four data bytes (32-bit value) with the most significant byte transmitted first, and finally a cyclic redundancy check (CRC) checksum byte. In case the distance between two bytes of a command message is longer than approximately 100ms, the message is discarded, and all bytes already received are removed from the input queue in expectation of a new command. LSB MSB 0 1 2 3 4 S T A R T S T O P 5 6 7 LSB MSB 0 1 2 3 4 5 6 7 S T A R T DEVICE ADDRESS LSB MSB 0 1 2 3 4 5 6 7 S T A R T COMMAND LSB MSB 0 1 5 6 7 S T A R T VALUE BYTE 3 (MSB) LSB MSB 0 1 2 3 4 5 6 7 S T A R T CRC S T O P S T O P S T O P VALUE BYTE 0 (LSB) 0x55 S T O P Figure 6. Bootloader UART Command Message (Received) Bootloader communication relies on a command and reply handshake mechanism for flow control. Next command should not be sent before the reply datagram has been received. The reply message starts with the controller address (default 0xff), the device address, one status byte, four data bytes (32-bit value) with the MSB first and finally a CRC checksum byte. LSB MSB 0 1 2 3 4 S T A R T S T O P 5 6 7 LSB MSB 0 1 2 3 4 5 6 7 S T A R T DEVICE ADDRESS LSB MSB 0 1 2 3 4 5 6 7 S T A R T STATUS LSB MSB 0 1 5 6 7 S T A R T VALUE BYTE 3 (MSB) LSB MSB 0 1 2 3 4 5 6 7 S T A R T CRC S T O P S T O P S T O P VALUE BYTE 0 (LSB) CONTROLLER ADDRESS S T O P Figure 7. Bootloader UART Reply Message (Transmitted) For more details on the content of these bytes, see the Bootloader section. At 40MHz system clock, standard baud rates between 9600 bits and 250000 bits can be expected to work with the autobaud detection mechanism. Higher baud rates usually require fixed baud rate settings and a more precise external clock or crystal clock instead of the internal clock generator. |
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