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AD8312 Datasheet(PDF) 18 Page - Analog Devices |
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AD8312 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 20 page ![]() AD8312 Data Sheet Rev. B | Page 18 of 20 Table 6. Evaluation Board Configuration Options Component Function Default Condition VPOS, GND Supply and Ground Vector Pins. Not Applicable C2 Power Supply Decoupling. The nominal supply decoupling consists of a 0.1 µF capacitor (C1). C2 = 0.1 µF (Size 0603) R1 Input Interface. The 52.3 Ω resistor in Position R1 combines with the internal input impedance of the AD8312 to give a broadband input impedance of around 50 Ω. R1 = 52.3 Ω (Size 0603) R2, R4 Slope Adjust. By installing resistors in R2 and R4, the nominal slope of 20 mV/dB can be changed. See the Increasing the Logarithmic Slope section for more details. R2 = Open (Size 0402) R4 = 0 Ω (Size 0402) C3 Filter Capacitor. The response time of VOUT can be modified by placing a capacitor between CFLT (Pin 4) and VOUT (Pin 2). C3 = Open (Size 0603) R3, R8, C4 Output Interface. R3, R8, and C4 can be used to check the response of VOUT to capacitive and resistive loading. R3/R8 can be used to attenuate VOUT. R3 = 0 Ω (Size 0603) R8 = C4 = Open (Size 0402) R7 VSET Interface. R7 can be used to reduce capacitive loading from transmission lines. R7 = 0 Ω (Size 0603) R5, R6 Alternate Interface. R5 and R6 allow for VOUT and VSET to be accessible from the edge connector, which is only used for characterization. R5 = R6 = Open (Size 0402) |
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