7.5.1.1.5 Timeout Function

The TMP118 resets the internal serial interface if the SCL line is held low by the controller or the SDA line is held

low by the TMP118 for longer than 30ms (typical) between a START and STOP condition. The TMP118 releases

the SDA line if the SCL pin is pulled low and waits for a START condition from the controller. To avoid activating

the timeout function, maintain a communication speed of at least 1kHz for the SCL operating frequency.

7.5.1.1.6 Coexistence on I3C Mixed Bus

A bus with both I3C and I2C interfaces is referred to as a mixed bus with clock speeds up to 12.5MHz.

The TMP118 is an I2C device that can be on the same bus that has an I3C device attached as the device

incorporates a spike suppression filter of 50ns on the SDA and SCL pins to filter out any communication above

4Mhz. The filter helps avoid any interference to the bus when I3C communication takes place on the bus. I2C

bus targets (with 50ns filter) can coexist with I3C controllers operating at 12.5MHz, enabling the migration of

existing I2C bus designs to the I3C specification.

TMP118

SNIS237 – DECEMBER 2024

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