voltage, the device continues switching for several cycles because of the delay time of the internal comparator

— then it stops switching. The load is supplied by the output capacitor, and the output voltage declines. When

the FB voltage falls below the PFM reference voltage, after the delay time of the comparator, the device starts

switching again to ramp up the output voltage.

Output

Voltage

VOUT_NOM

1.01 x VOUT_NOM

PFM mode at light load

PWM mode at heavy load

Figure 6-2. Output Voltage in PWM Mode and PFM Mode

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TPSM81033

SLVSHL0D – JUNE 2024 – REVISED DECEMBER 2024

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