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MAX8790 Datasheet(PDF) 14 Page - Maxim Integrated Products |
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MAX8790 Datasheet(HTML) 14 Page - Maxim Integrated Products |
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14 / 24 page ![]() clamped to a level set with the OV feedback input. When this elevated output voltage is applied to the undamaged strings, excessive voltage drop develops across the FB_ pins. If the resulting HVC signal exceeds VCC + 0.6V for greater than 65ms, the fault latch is triggered to protect the circuit. LED-Short and String Mismatch Protection Normally, white LEDs have variations in forward-voltage drop of 3.1V to 3.6V. The MAX8790 can tolerate slight mismatches between LED strings. When the sum of the LED forward voltages creates a mismatch in the strings so the HVC signal exceeds VCC + 0.6V for greater than 65ms, the fault latch is triggered in much the same way as the circuit responds to open string faults. Similar pro- tection is activated when an LED is shorted. The larger the number of series-connected LEDs (N), the smaller the tolerable mismatch between LEDs: VSAT ≈ 450mV and VCC = 5V For N = 8, the average error per LED = 644mV. For N = 10, the average error per LED = 510mV. The larger the total mismatch, the larger the voltage drop required across each current source to correct for the error, and therefore the larger the dissipation within the MAX8790. Dimming Control The MAX8790 features both analog and digital dim- ming control. Analog dimming can provide potentially higher converter efficiency because of low voltage drop across each WLED when the current is low. Digital dim- ming (DPWM) provides less WLED color distortion since the WLED current is held at full scale when the WLED is on. The MAX8790’s dimming control circuit consists of a PLL, a digital comparator, and a DAC. The controller provides 100:1 dimming range through either analog or digital control methods. Both methods translate the duty cycle of the BRT input into a control signal for the LED current sources. In analog dimming mode, the cur- rent-source outputs are DC and the BRT duty cycle (12.5% < DBRT < 100%) modulates the amplitude of the currents. For DBRT < 12.5%, the LED current is digi- tally modulated to reduce the average LED current down to 1% of full scale. The PLL detects the BRT fre- quency and phase, and adjusts the current-source amplitude and duty cycle synchronously (see Figure 4). Average Error Per LED V N = 5 150 . Error V N ∑ < 5 150 . Error V V V N CC SAT ∑ <+ − 06 . Six-String White LED Driver with Active Current Balancing for LCD Panel Applications 14 ______________________________________________________________________________________ BRT 0A ILEDMAX ILED ANALOG DIMMING MODE D = 50% D = 30% D = 12.5% D = 6.25% D = tON tON tBRT tBRT Figure 4. LED Current Control Using Analog Dimming Mode |
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