ADS7846 datasheet(8/29 Pages) SYC

8 / 29 page

ADS7846

SBAS125H

www.ti.com

THEORY OF OPERATION

The ADS7846 is a classic successive approximation register

(SAR) analog-to-digital converter (ADC). The architecture is

based on capacitive redistribution which inherently includes

a sample-and-hold function. The converter is fabricated on a

0.6

µm CMOS process.

The basic operation of the ADS7846 is shown in Figure 1.

The device features an internal 2.5V reference and an

external clock. Operation is maintained from a single supply

of 2.7V to 5.25V. The internal reference can be overdriven

with an external, low impedance source between 1V and

+VCC. The value of the reference voltage directly sets the

input range of the converter.

The analog input (X-, Y-, and Z-position coordinates, auxil-

iary input, battery voltage, and chip temperature) to the

converter is provided via a multiplexer. A unique configura-

tion of low on-resistance touch panel driver switches allows

an unselected ADC input channel to provide power and its

accompanying pin to provide ground for an external device,

such as a touch screen. By maintaining a differential input to

the converter and a differential reference architecture, it is

possible to negate the error from each touch panel driver

switch’s on-resistance (if this is a source of error for the

particular measurement).

ANALOG INPUT

See Figure 2 for a block diagram of the input multiplexer on

the ADS7846, the differential input of the ADC, and the

differential reference of the converter. Table I and Table II

show the relationship between the A2, A1, A0, and SER/DFR

control bits and the configuration of the ADS7846. The

control bits are provided serially via the DIN pin—see the

Digital Interface section of this data sheet for more details.

When the converter enters the hold mode, the voltage

difference between the +IN and –IN inputs (see Figure 2) is

captured on the internal capacitor array. The input current

into the analog inputs depends on the conversion rate of the

device. During the sample period, the source must charge

the internal sampling capacitor (typically 25pF). After the

capacitor has been fully charged, there is no further input

current. The rate of charge transfer from the analog source

to the converter is a function of conversion rate.

FIGURE 1. Basic Operation of the ADS7846.

VBAT

AUXIN

TEMP

Y–

X+

Y+

Y-POSITION

X-POSITION

Z1-POSITION Z2-POSITION

X-DRIVERS

Y-DRIVERS

+IN (TEMP0)

Off

+IN

Measure

Off

+IN

Off

+IN

Measure

X–, On

Y+, On

+IN

Measure

X–, On

Y+, On

+IN

Measure

Off

+IN

Off

+IN (TEMP1)

Off

TABLE I. Input Configuration (DIN), Single-Ended Reference Mode (SER/DFR high).

TABLE II. Input Configuration (DIN), Differential Reference Mode (SER/DFR low).

+REF

–REF

Y–

X+

Y+

Y-POSITION

X-POSITION

Z1-POSITION

Z2-POSITION

DRIVERS ON

Y+

Y–

+IN

Measure

Y+, Y–

Y+

X–

+IN

Measure

Y+, X–

Y+

X–

+IN

Measure

Y+, X–

X+

X–

+IN

Measure

X+, X–

X+

Y+

X–

Y–

GND

BAT

AUX

DCLK

DIN

BUSY

DOUT

PENIRQ

REF

Serial/Conversion Clock

Chip Select

Serial Data In

Converter Status

Serial Data Out

µF

(Optional)

+2.7V to +5V

ADS7846

Auxiliary Input

To Battery

Voltage

Regulator

Touch

Screen

0.1

µF

Pen Interrupt

50k

Ω

ADS7846 Datasheet(PDF) 8 Page - SYC Electronica

ADS7846 Datasheet(HTML) 8 Page - SYC Electronica

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

Datasheet Download

Link URL