PCAL9722 datasheet(48/63 Pages) NXP

48 / 63 page

NXP Semiconductors

PCAL9722

Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and

reset

14 Parameter measurement information

aaa-015952

DUT

CL = 100 pF

RL = 4.7 k

INT

VDD(SPI)

a. Interrupt load configuration

1 0 0 0 0 0 1

slave address

data from port 0

data from port 1

SDIN

SDOUT

DATA 01

DATA 12

trst(INT)

tsu(D)

0 0 0 0 0 0 0

R/W

SCLK

data into port 0

data into port 1

INT

9 10 11 12 13 14 15 16 17 18 19 20 21

23 24 25 26

28 29 30 31 32

DATA 10

DATA 11

DATA 12

View B-B

View A-A

tv(INT)

INT

tv(INT)

0.5 × VDD(SPI)

0.5 × VDD(P)

aaa-015951

SCLK

0.5 × VDD(SPI)

INT

24th

25th

trst(INT)

0.3 × VDD(SPI)

0.7 × VDD(SPI)

trst(INT)

CL includes probe and jig capacitance.

All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo = 50 Ω; tr/tf ≤ 30 ns.

All parameters and waveforms are not applicable to all devices.

b. Voltage waveforms

Figure 29. Interrupt load circuit and voltage waveforms

PCAL9722

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.1 — 1 May 2023

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