PCAL9722 datasheet(6/63 Pages) NXP

6 / 63 page

NXP Semiconductors

PCAL9722

Ultra low-voltage translating 22-bit SPI I/O expander with Agile I/O features, interrupt output and

reset

5 Pinning information

5.1 Pinning

aaa-015858

PCAL9722HN

Transparent top view

P2_0

P0_6

P0_7

P2_1

P0_5

P2_2

P0_4

P2_3

P0_3

P2_4

P0_2

P2_5

P0_1

P0_0

SDOUT

terminal 1

index area

Figure 2. Pin configuration for HVQFN32

5.2 Pin description

Symbol

Type

Description

SCLK

SPI serial clock input

SDIN

SPI serial data input

VDD(SPI)

power supply

Supply voltage of SPI bus. Connect directly to the VDD of the external SPI

bus master. Provides voltage-level translation.

INT

Interrupt output. Connect to VDD(SPI) or VDD(P) through a pull-up resistor.

P0_0 [1]

I/O

Port 0 input/output 0

P0_1 [1]

I/O

Port 0 input/output 1

P0_2 [1]

I/O

Port 0 input/output 2

P0_3 [1]

I/O

Port 0 input/output 3

P0_4 [1]

I/O

Port 0 input/output 4

P0_5 [1]

I/O

Port 0 input/output 5

P0_6 [1]

I/O

Port 0 input/output 6

P0_7 [1]

I/O

Port 0 input/output 7

P1_0 [2]

I/O

Port 1 input/output 0

P1_1 [2]

I/O

Port 1 input/output 1

P1_2 [2]

I/O

Port 1 input/output 2

P1_3 [2]

I/O

Port 1 input/output 3

P1_4 [2]

I/O

Port 1 input/output 4

Table 3. Pin description

PCAL9722

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.1 — 1 May 2023

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