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TMP89FS60 Datasheet(PDF) 275 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 275 Page - Toshiba Semiconductor |
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275 / 410 page ![]() Page 261 TMP89FS60 RA001 18. Serial Bus Interface (SBI) The TMP89FS60 contains 1 channels of serial bus interface (SBI). The serial bus interface supports serial communication conforming to the I2C bus standards. It has clock synchro- nization and arbitration functions, and supports the multi-master in which multiple masters are connected on a bus. It also supports the unique free data format. 18.1 Communication Format 18.1.1 I2C bus The I2C bus is connected to devices via the SDA0 and SCL0 pins and can communicate with multiple devices. Figure 18-1 Device Connections Communications are implemented between a master and slave. The master transmits the start condition, the slave addresses, the direction bit and the stop condition to the slave(s) connected to the bus, and transmits and receives data. The slave detects these conditions transmitted from the master by the hardware, and transmits and receives data. The data format of the I2C bus that can communicate via the serial bus interface is shown in Figure 18-2. The serial bus interface does not support the following functions among those specified by the I2C bus stan- dards: 1. Start byte 2. 10-bit addressing 3. SDA and SCL pins falling edge slope control VDD Device 1 SDA SCL Device 2 SDA SCL Device n SDA SCL |
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