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AM69 Datasheet(PDF) 159 Page - Texas Instruments

Part # AM69
Description  AM69x Processors, Silicon Revision 1.0
PDF  326 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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AM69 Datasheet(HTML) 159 Page - Texas Instruments

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6.6.10 SerDes 2-L-PHY/4-L-PHY Electrical Characteristics
Note
The PCIe interfaces are compliant with the electrical parameters specified in PCI Express® Base
Specification Revision 4.0, September 27, 2017.
This Device imposes an additional limit on SERDES REFCLK when used in Input mode with internal
termination enabled, as described by parameter VREFCLK_TERM in Table 6-2, 4-L-PHY SERDES
REFCLK Electrical Characteristics. Internal termination is enabled by default and must be disabled
before applying a reference clock signal that exceeds the limits defined by VREFCLK_TERM. External
termination should always be enabled on the source side.
Table 6-2. 4-L-PHY SERDES REFCLK Electrical Characteristics
Only applies when internal termination is enabled. Over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
VREFCLK_TER
M
Single ended voltage threshold at the reference clock
pin when internal termination is enabled
400
mV
RTERM
Internal termination
40
50
62.5
Ω
Note
The SerDes USB interfaces are compliant with the USB3.1 SuperSpeed Transmitter and Receiver
Normative Electrical Parameters as defined in the Universal Serial Bus 3.1 Specification, Revision
1.0 , July 26, 2013.
Note
The SGMII interfaces electrical characteristics are compliant with 1000BASE-KX per IEEE802.3
Clause 70.
Note
The SGMII 2.5G / XAUI interfaces electrical characteristics are compliant with IEEE802.3 Clause 47.
Note
The QSGMII interface electrical characteristics are compliant with QSGMII Specification revision 1.2.
Note
USXGMII supports IEEE 802.3 TX and RX electrical characteristics of Clause 72-7 and Annex 69B.
IEEE 802.3 Tables 72-7 and 72-8 are not required by USXGMII since these tables are associated with
training (Clause 72-6), which is not a requirement of USXGMII.
The pre, main, and post cursors should be set by using BER sweeps.
Note
The UFS interface electrical characteristics are compliant with MIPI M-PHY Specification v3.1,
February 17, 2014.
www.ti.com
AM69A, AM69
SPRSP92D – FEBRUARY 2023 – REVISED DECEMBER 2024
Copyright © 2024 Texas Instruments Incorporated
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Product Folder Links: AM69A AM69



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