TMP88CS38 datasheet(106/226 Pages) TOSHIBA

106 / 226 page

TMP88CS38/CM38A/CP38A

2007-09-12

88CS38-106

Example: Program to stop transmitting data. (When external clock is used.)

STEST1:

TEST

(SBISRB). SEF

;

If SEF

= 1 then loop

JRS

F, STEST1

STEST2:

TEST

(P5). 3

;

If SCK

= 0 then loop

JRS

T, STEST2

(SBICRA), 00000111B

;

SIOS

← 0

Figure 2.9.25 Transmitted Data Hold Time at End of Transmit

b. 8-bit receive mode

Set a control register to a receive mode and the SIOS to “1” for switching to a

receive mode.

Data is received from the SI pin to the shift register in synchronous with the

serial clock, starting from the least significant bit (LSB). When the 8-bit data is

received, the data is transferred from the shift register to the SBIDBR. The

INTSBI (Buffer full) interrupt request is generated to request of reading the

received data. The data is read from the SBIDBR by the interrupt service

program.

When the external clock is used, since shift operation is synchronized with the

clock pulse provided externally, the received data should be read from SBIDBR

before next serial clock is input. If the received data is not read, further data to be

received is canceled.

When the internal clock is used, the automatic wait function is executed until

received data is read from SBIDBR.

The maximum transfer speed when the external clock is used is determined by

the delay time between the time when an interrupt request is generated and the

time when received data is read.

Received data disappears if this data is not completely read before reception of

the next data terminates. In this case, the next data received is read.

Receiving data is ended by clearing the SIOS to “0” by the buffer full interrupt

service program or setting the SIOINH to “1”. When the SIOS is cleared, received

data is transferred to the SBIDBR in complete blocks. The received mode ends

when the transfer is complete. In order to confirm if data is surely received by the

program, set the SIOF (Bit3 in SBIDBR) to be sensed. The SIOF is cleared to “0”

when receiving is complete. After confirming that receiving has ended, the last

data is read. When the SIOINH is set, receiving data stops. The SIOF turns “0”

(the received data becomes invalid, therefore no need to read it).

Note:

When the transfer mode is switched, the SBIDBR contents are lost. In case

that the mode needs to be switched, receiving data is concluded by clearing

the SIOS to “0”, read the last data, and then switch the mode.

SIOF

SCK

SO pin

Bit6

Bit7

tSODH = Min 3.5/fc [s] (in NORMAL mode, IDLE mode)

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