TMP88CS38 datasheet(214/226 Pages) TOSHIBA

214 / 226 page

TMP88CS38/CM38A/CP38A

2007-09-12

88CS38-214

2.17.4

Clamp and Data Slicer Operation

The slicer uses the following steps to obtain the caption signals:

The composite video signal input via VIN1 (Pin 40) is clamped by the sync tip

clamp circuit and the HD and VD sync signals separated by the sync separation

circuit.

Field decision and caption line detection are effected using the HD and VD sync

signals

The CRI signal of the caption line interval is detected from the pedestal clamped

video signal at VIN0 (Pin 41).

The slice level is controlled during the CRI signal interval, detected by the slice

level control block, to obtain the optimum level.

To determine the timing for extracting the caption data, a sampling clock is

generated that is phase locked to the CRI.

The caption data is extracted at the selected slice level using sampling clock,

which is locked to the caption data.

The data slicer has two separation circuits:

a. Sync signal (sync tip clamp

+ sync signal slice) separation.

b. Caption data (pedestal clamp

+ data slice) separation.

The two circuits are described briefly below.

Sync signal separation

Slice level setting and

generation of sampling clock

Caption line detection

CRI detection

Caption signal extraction

TMP88CS38 Datasheet(PDF) 214 Page - Toshiba Semiconductor