LT8640 datasheet(23/32 Pages) AD

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LT8640S/LT8643S/

LT8640SA/LT8643SA

Rev. D

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APPLICATIONS INFORMATION

Enable Pin

The LT8640S/LT8643S/LT8640SA/LT8643SA is in shut-

down when the EN pin is low and active when the pin is

high. The rising threshold of the EN comparator is 1.0V,

with 40mV of hysteresis. The EN pin can be tied to VIN if

the shutdown feature is not used, or tied to a logic level

if shutdown control is required.

Adding a resistor divider from VIN to EN programs the

LT8640S/LT8643S/LT8640SA/LT8643SA to regulate the

output only when VIN is above a desired voltage (see the

Block Diagram). Typically, this threshold, VIN(EN), is used

in situations where the input supply is current limited, or

has a relatively high source resistance. A switching regu-

lator draws constant power from the source, so source

current increases as source voltage drops. This looks like

a negative resistance load to the source and can cause

the source to current limit or latch low under low source

voltage conditions. The VIN(EN) threshold prevents the

regulator from operating at source voltages where the

problems might occur. This threshold can be adjusted by

setting the values R3 and R4 such that they satisfy the

following equation:

VIN(EN) =

⎛

⎝⎜

⎞

⎠⎟

•1.0V

(12)

where the LT8640S/LT8643S/LT8640SA/LT8643SA will

remain off until VIN is above VIN(EN). Due to the compara-

tor’s hysteresis, switching will not stop until the input falls

slightly below VIN(EN).

When operating in Burst Mode operation for light load

currents, the current through the VIN(EN) resistor network

can easily be greater than the supply current consumed by

the LT8640S/LT8643S/LT8640SA/LT8643SA. Therefore,

the VIN(EN) resistors should be large to minimize their

effect on efficiency at low loads.

INTVCC Regulator

An internal low dropout (LDO) regulator produces the

3.4V supply from VIN that powers the drivers and the

internal bias circuitry. The INTVCC can supply enough cur-

rent for the LT8640S/LT8643S/LT8640SA/LT8643SA’s

circuitry. To improve efficiency the internal LDO can also

draw current from the BIAS pin when the BIAS pin is at

3.1V or higher. Typically the BIAS pin can be tied to the

output of the LT8640S/LT8643S/LT8640SA/LT8643SA,

or can be tied to an external supply of 3.3V or above. If

BIAS is connected to a supply other than VOUT, be sure

to bypass with a local ceramic capacitor. If the BIAS pin is

below 3.0V, the internal LDO will consume current from

8640S F05

gm = 5S

gm = 1.7mS

CURRENT MODE

POWER STAGE

LT8643S/

LT8643SA

150k

0.97V

–

CPL

COUT

OUTPUT

Figure 5. Model for Loop Response

VIN. Applications with high input voltage and high switch-

ing frequency where the internal LDO pulls current from

VIN will increase die temperature because of the higher

power dissipation across the LDO. Do not connect an

external load to the INTVCC pin.

Frequency Compensation (LT8643S/LT8643SA Only)

Loop compensation determines the stability and transient

performance, and is provided by the components tied to

the VC pin. Generally, a capacitor (CC) and a resistor (RC)

in series to ground are used. Designing the compensation

network is a bit complicated and the best values depend

on the application. A practical approach is to start with

one of the circuits in this data sheet that is similar to your

application and tune the compensation network to opti-

mize the performance. LTspice® simulations can help in

this process. Stability should then be checked across all

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