AD5422 datasheet(33/37 Pages) AD

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Preliminary Technical Data

AD5422

Rev. PrE | Page 33 of 37

APPLICATIONS INFORMATION

DRIVING INDUCTIVE LOADS

When driving inductive or poorly defined loads connect a

0.01µF capacitor between IOUT and GND. This will ensure

stability with loads beyond 50mH. There is no maximum

capacitance limit. The capacitive component of the load may

cause slower settling, though this may be masked by the settling

time of the AD5422.

TRANSIENT VOLTAGE PROTECTION

The AD5422 contains ESD protection diodes which prevent

damage from normal handling. The industrial control

environment can, however, subject I/O circuits to much higher

transients. In order to protect the AD5422 from excessively high

voltage transients , external power diodes and a surge current

limiting resistor may be required, as shown in Figure 63. The

constraint on the resistor value is that during normal operation

the output level at IOUT must remain within its voltage

compliance limit of AVDD – 2.5V and the two protection diodes

and resistor must have appropriate power ratings.

IOUT

AGND

AVDD

RLOAD

AVDD

AD5422

Figure 63. Output Transient Voltage Protection

LAYOUT GUIDELINES

In any circuit where accuracy is important, careful consideration

of the power supply and ground return layout helps to ensure

the rated performance. The printed circuit board on which the

AD5422 is mounted should be designed so that the analog and

digital sections are separated and confined to certain areas of the

board. If the AD5422 is in a system where multiple devices

require an AGND-to-DGND connection, the connection

should be made at one point only. The star ground point should

be established as close as possible to the device.

The AD5422 should have ample supply bypassing of 10 µF in

parallel with 0.1 µF on each supply located as close to the

package as possible, ideally right up against the device. The 10

µF capacitors are the tantalum bead type. The 0.1 µF capacitor

should have low effective series resistance (ESR) and low

effective series inductance (ESI) such as the common ceramic

types, which provide a low impedance path to ground at high

frequencies to handle transient currents due to internal logic

switching.

The power supply lines of the AD5422 should use as large a

trace as possible to provide low impedance paths and reduce the

effects of glitches on the power supply line. Fast switching

signals such as clocks should be shielded with digital ground to

avoid radiating noise to other parts of the board and should

never be run near the reference inputs. A ground line routed

between the SDIN and SCLK lines helps reduce crosstalk

between them (not required on a multilayer board that has a

separate ground plane, but separating the lines helps). It is

essential to minimize noise on the REFIN line because it

couples through to the DAC output.

Avoid crossover of digital and analog signals. Traces on

opposite sides of the board should run at right angles to each

other. This reduces the effects of feed through the board. A

microstrip technique is by far the best, but not always possible

with a double-sided board. In this technique, the component

side of the board is dedicated to ground plane, while signal

traces are placed on the solder side.

GALVANICALLY ISOLATED INTERFACE

In many process control applications, it is necessary to provide

an isolation barrier between the controller and the unit being

controlled to protect and isolate the controlling circuitry from

any hazardous common-mode voltages that might occur. The

Coupler® family of products from Analog Devices provides

voltage isolation in excess of 2.5 kV. The serial loading structure

of the AD5422 make it ideal for isolated interfaces because the

number of interface lines is kept to a minimum. Figure 64 shows

a 4-channel isolated interface to the AD5422 using an

ADuM1400. For further information, visit

http://www.analog.com/icouplers.

ENCODE

DECODE

ENCODE

DECODE

ENCODE

DECODE

VIA

VIB

VIC

VOA

VOB

VOC

ENCODE

DECODE

VID

VOD

ADuM1400 *

Controller

Serial Clock Out

Serial Data Out

SYNC Out

Control out

To SCLK

To SDIN

To LATCH

To CLEAR

*ADDITIONAL PINS OMITTED FOR CLARITY

Figure 64. Isolated Interface

MICROPROCESSOR INTERFACING

Microprocessor interfacing to the AD5422 is via a serial bus that

uses protocol compatible with microcontrollers and DSP

processors. The communications channel is a 3-wire

(minimum) interface consisting of a clock signal, a data signal,

and a latch signal. The AD5422 require a 24-bit data-word with

data valid on the rising edge of SCLK.

For all interfaces, the DAC output update is initiated on the

rising edge of LATCH. The contents of the registers can be read

using the readback function.

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