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DIX4192 Datasheet(PDF) 37 Page - Texas Instruments |
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DIX4192 Datasheet(HTML) 37 Page - Texas Instruments |
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37 / 71 page  37 DIX4192 www.ti.com SBFS031F – FEBRUARY 2006 – REVISED SEPTEMBER 2016 Product Folder Links: DIX4192 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Figure 41. Register 13: Receiver Status Register 1 (Read-Only) 7 (MSB) 6 5 4 3 2 1 0 (LSB) 0 0 0 0 0 0 RXCKR1 RXCKR0 Table 21. Register 13: Receiver Status Register 1 (Read-Only) Field Descriptions RXCKR[1:0] Maximum Available Recovered Clock Rate These two bits indicate the maximum available RXCKO clock rate based upon the DIR detection circuitry, which determines the frame rate of the incoming AES3-encoded bit stream. Based upon the estimated frame rate, a maximum rate for the recovered clock output (RXCKO) is determined and output from PLL2, as well as being loaded into the RXCKR0 and RXCKR1 status bits. The status of the RXCKR0 and RXCKR1 bits may be used to determine the programmed value for the PLL2 output clock divider, set by the RXCKOD0 and RXCKOD1 bits in control register 0x0E. RXCKR1 RXCKR0 Maximum Available RXCKO Rate 0 0 Clock rate not determined. 0 1 128fS 1 0 256fS 1 1 512fS Figure 42. Register 14: Receiver Status Register 2 (Read-Only) 7 (MSB) 6 5 4 3 2 1 0 (LSB) CSCRC PARITY VBIT BPERR QCHG UNLOCK QCRC RBTI Note: Status bits must be unmasked in control register 0x16 in order for the status interrupts to be generated. Table 22. Register 14: Receiver Status Register 2 (Read-Only) Field Descriptions CSCRC Channel Status CRC Status CSCRC CRC Status 0 No error 1 CRC error detected PARITY Parity Status PARITY Parity Status 0 No error 1 Parity error detected VBIT Validity Bit Status VBIT Validity Bit 0 Valid audio data indicated 1 Non-valid data indicated BPERR Biphase Encoding Error Status BPERR Biphase Encoding Status 0 No error 1 Biphase encoding error detected QCHG Q-Channel Sub-Code Data Change Status QCHG Q-Channel Data Status 0 No change in Q-channel sub-code data. 1 Q-channel data has changed. May be used to trigger a read of the Q-channel sub-code data, registers 0x1F through 0x28. UNLOCK DIR Unlock Error Status UNLOCK DIR Lock Status 0 No error; the DIR AES3 decoder and PLL2 are locked. 1 DIR lock error; the AES3 decoder and PLL2 are unlocked. QCRC Q-Channel Sub-Code CRC Status QCRC Q-Channel CRC Status 0 No error 1 Q-channel sub-code data CRC error detected. RBTI Receiver Buffer Transfer Interrupt Status RBTI DIR RA Buffer-to-UA Buffer Transfer Status |
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