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DIX4192 Datasheet(PDF) 43 Page - Texas Instruments |
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DIX4192 Datasheet(HTML) 43 Page - Texas Instruments |
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43 / 71 page ![]() 43 DIX4192 www.ti.com SBFS031F – FEBRUARY 2006 – REVISED SEPTEMBER 2016 Product Folder Links: DIX4192 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Figure 52. Register 1D: General-Purpose Output 3 (GPO3) Control Register 7 (MSB) 6 5 4 3 2 1 0 (LSB) 0 0 0 0 GPO33 GPO32 GPO31 GPO30 Table 31. Register 1D: General-Purpose Output 3 (GPO3) Control Register Field Descriptions GPO[33:30] General-Purpose Output 3 (GPO3) Configuration These bits are used to set the state or data source for the general-purpose digital output pin GPO3. GPO33 GPO32 GPO31 GPO30 GPO3 Function 0 0 0 0 GPO3 is forced low (default) 0 0 0 1 GPO3 is forced high 0 0 1 0 Reserved 0 0 1 1 Transmitter interrupt, active low 0 1 0 0 Receiver interrupt, active low 0 1 0 1 Receiver 50/15-μs pre-emphasis, active low 0 1 1 0 Receiver non-audio data, active high 0 1 1 1 Receiver non-valid data, active high 1 0 0 0 Receiver channel status bit 1 0 0 1 Receiver user data bit 1 0 1 0 Receiver block start clock 1 0 1 1 Receiver COPY bit (0 = copyright asserted, 1 = copyright not asserted) 1 1 0 0 Receiver L-bit (0 = first generation or higher, 1 = original) 1 1 0 1 Receiver parity error, active high 1 1 1 0 Receiver internal sync clock 1 1 1 1 Transmitter internal sync clock Figure 53. Register 1E: General-Purpose Output 4 (GPO4) Control Register 7 (MSB) 6 5 4 3 2 1 0 (LSB) 0 0 0 0 GPO43 GPO42 GPO41 GPO40 Table 32. Register 1E: General-Purpose Output 4 (GPO4) Control Register Field Descriptions GPO[43:40] General-Purpose Output 4 (GPO4) Configuration These bits are used to set the state or data source for the general-purpose digital output pin GPO4. GPO43 GPO42 GPO41 GPO40 GPO4 Function 0 0 0 0 GPO4 is forced low (default) 0 0 0 1 GPO4 is forced high 0 0 1 0 Reserved 0 0 1 1 Transmitter interrupt, active low 0 1 0 0 Receiver interrupt, active low 0 1 0 1 Receiver 50/15-μs pre-emphasis, active low 0 1 1 0 Receiver non-audio data, active high 0 1 1 1 Receiver non-valid data, active high 1 0 0 0 Receiver channel status bit 1 0 0 1 Receiver user data bit 1 0 1 0 Receiver block start clock 1 0 1 1 Receiver COPY bit (0 = copyright asserted, 1 = copyright not asserted) 1 1 0 0 Receiver L-bit (0 = first generation or higher, 1 = original) 1 1 0 1 Receiver parity error, active high 1 1 1 0 Receiver internal sync clock 1 1 1 1 Transmitter internal sync clock |
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