15

9 ,16

11

10

12

13

14

IN -

IN +

RDY

RST

10 k

10 k

FLT

VCC1

0. 1 µ F

GND 1

3 V - 5 V

10 R

ISO 5451 ± Q1

µ C

Copyright © 2016, Texas Instruments Incorporated

1 k

OUT

DESAT

GND2

VCC2

NC

15 V

1 F

DDST

VEE2

CLAMP

3

1,8

5

4

6

2

7

15

9,16

11

10

12

13

14

0.1 F

3 V to 5.5 V

220

pF

ISO5451-Q1

10 k

10 k

10

RG

IN±

IN+

RDY

VCC1

GND1

FLT

RST

Copyright © 2016, Texas Instruments Incorporated

1 k

OUT

DESAT

GND2

VCC2

NC

15 V

1 F

DDST

VEE2

CLAMP

3

1,8

5

4

6

2

7

15

9,16

11

10

12

13

14

IN±

IN+

RDY

VCC1

0.1 F

GND1

3 V to 5.5 V

220

pF

ISO5451-Q1

FLT

RST

10 k

10 k

10

RG

15 V

1 F

Copyright © 2016, Texas Instruments Incorporated

24

ISO5451-Q1

SLLSEQ3A – SEPTEMBER 2016 – REVISED DECEMBER 2016

www.ti.com

Product Folder Links: ISO5451-Q1

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Copyright © 2016, Texas Instruments Incorporated

A 0.1-μF bypass capacitor, recommended at input supply pin VCC1 and 1-μF bypass capacitor, recommended at

output supply pin VCC2, provide the large transient currents necessary during a switching transition to ensure

reliable operation. The 220 pF blanking capacitor disables DESAT detection during the off-to-on transition of the

power device. The DESAT diode (DDST) and its 1-kΩ series resistor are external protection components. The RG

gate resistor limits the gate charge current and indirectly controls the IGBT collector voltage rise and fall times.

The open-drain FLT output and RDY output has a passive 10-k

Ω pullup resistor. In this application, the IGBT

gate driver is disabled when a fault is detected and will not resume switching until the microcontroller applies a

reset signal.

Figure 43. Unipolar Output Supply

Figure 44. Bipolar Output Supply

10.2.2.2 FLT and RDY Pin Circuitry

There is 50k pullup resistor internally on FLT and RDY pins. The FLT and RDY pin is an open-drain output. A 10-

k

Ω pullup resistor can be used to make it faster rise and to provide logic high when FLT and RDY is inactive, as

shown in Figure 45.

Fast common mode transients can inject noise and glitches on FLT and RDY pins due to parasitic coupling. This

is dependent on board layout. If required, additional capacitance (100 pF to 300 pF) can be included on the FLT

and RDY pins.

Figure 45. FLT and RDY Pin Circuitry for High CMTI