VCC2

15 V

8 V

RG

OUT

ISO 5451 - Q1

ron-max

QG

VEE2

roff-max

Copyright © 2016, Texas Instruments Incorporated

(

)

on-max

off-max

OL-WC

INP

G

CC2

EE2

on-max

G

off-max

G

r

r

P

= 0.5

f

Q

V

V

+

r

+ R

r

+ R

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´

´

´

-

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÷

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28

ISO5451-Q1

SLLSEQ3A – SEPTEMBER 2016 – REVISED DECEMBER 2016

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Product Folder Links: ISO5451-Q1

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Copyright © 2016, Texas Instruments Incorporated

10.2.2.9 Determining the Maximum Available, Dynamic Output Power, POD-max

The ISO5451-Q1 maximum allowed total power consumption of PD = 251 mW consists of the total input power,

PID, the total output power, POD, and the output power under load, POL:

PD = PID + POD + POL

(1)

With:

PID = VCC1-max × ICC1-max = 5.5 V × 4.5 mA = 24.75 mW

(2)

and:

POD = (VCC2 – VEE2) × ICC2-max = (15V – ( –8V)) × 6 mA = 138 mW

(3)

then:

POL = PD – PID – POD = 251 mW – 24.75 mW – 138 mW = 88.25 mW

(4)

In comparison to POL, the actual dynamic output power under worst case condition, POL-WC, depends on a variety

of parameters:

where

•

fINP = signal frequency at the control input IN+

•

QG = power device gate charge

•

VCC2 = positive output supply with respect to GND2

•

VEE2 = negative output supply with respect to GND2

•

ron-max = worst case output resistance in the on-state: 4 Ω

•

roff-max = worst case output resistance in the off-state: 2.5 Ω

•

RG = gate resistor

(5)

Once RG is determined, Equation 5 is to be used to verify whether POL-WC < POL. Figure 50 shows a simplified

output stage model for calculating POL-WC.

Figure 50. Simplified Output Model for Calculating POL-WC

10.2.2.10 Example

This examples considers an IGBT drive with the following parameters:

ION-PK = 2 A, QG = 650 nC, fINP = 20 kHz, VCC2 = 15V, VEE2 = –8 V

(6)

Apply the value of the gate resistor RG = 10 Ω.