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ISO5451-Q1

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SLLSEQ3A – SEPTEMBER 2016 – REVISED DECEMBER 2016

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(1)

Measured at same supply voltage and temperature condition

(2)

Measured from input pin to ground.

7.10 Switching Characteristics

Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, VCC1 = 5 V, VCC2 –

GND2 = 15 V, GND2 – VEE2 = 8 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tr

Output signal rise time

CLOAD = 1 nF, see Figure 38, Figure 39 and

Figure 40

12

20

35

ns

tf

Output signal fall time

12

20

37

ns

tPLH, tPHL

Propagation Delay

76

110

ns

tsk-p

Pulse Skew |tPHL – tPLH|

20

ns

tsk-pp

Part-to-part skew

30(1)

ns

tGF

Glitch filter on IN+, IN–, RST

20

30

40

ns

tDESAT (10%)

DESAT sense to 10% OUT delay

300

415

500

ns

tDESAT (GF)

DESAT glitch filter delay

330

ns

tDESAT (FLT)

DESAT sense to FLT-low delay

see Figure 40

2000

2420

ns

tLEB

Leading edge blanking time

see Figure 38 and Figure 39

330

400

500

ns

tGF(RSTFLT)

Glitch filter on RST for resetting FLT

300

800

ns

CI

Input capacitance(2)

VI = VCC1/2 + 0.4 × sin (2πft), f = 1 MHz,

VCC1 = 5 V

2

pF

CMTI

Common-mode transient immunity

VCM = 1500 V, see Figure 41

50

100

kV/μs