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ISO5451 Datasheet(PDF) 5 Page - Texas Instruments |
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ISO5451 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 39 page ![]() 5 ISO5451-Q1 www.ti.com SLLSEQ3A – SEPTEMBER 2016 – REVISED DECEMBER 2016 Product Folder Links: ISO5451-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953). 7.4 Thermal Information THERMAL METRIC(1) ISO5451-Q1 UNIT DW (SOIC) 16 PINS RθJA Junction-to-ambient thermal resistance 99.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 48.5 °C/W RθJB Junction-to-board thermal resistance 56.5 °C/W ψJT Junction-to-top characterization parameter 29.2 °C/W ψJB Junction-to-board characterization parameter 56.5 °C/W (1) Full chip power dissipation is de-rated 10.04 mW/°C beyond 25°C ambient temperature. At 125°C ambient temperature, a maximum of 251 mW total power dissipation is allowed. Power dissipation can be optimized depending on ambient temperature and board design, while ensuring that Junction temperature does not exceed 150°C. 7.5 Power Ratings PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PD Maximum power dissipation(1) 1255 mW PID Maximum input power dissipation 175 mW POD Maximum output power dissipation 1080 mW |
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