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LP38500 Datasheet(PDF) 4 Page - Texas Instruments

Part # LP38500
Description  LP3850x-ADJ, LP3850xA-ADJ 1.5-A Flexcap Low-Dropout Linear Regulator for 2.7-V to 5.5-V Inputs
PDF  33 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LP38500 Datasheet(HTML) 4 Page - Texas Instruments

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LP38500-ADJ, LP38502-ADJ
SNVS539H – NOVEMBER 2007 – REVISED SEPTEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
MAX
UNIT
Input pin voltage (survival)
−0.3
6
V
Enable pin voltage (survival)
−0.3
6
V
Output pin voltage (survival)
−0.3
6
V
IOUT (survival)
Internally limited
Power dissipation(3)
Internally limited
Storage temperature, Tstg
−65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Office/ Distributors for availability and
specifications.
(3)
Operating junction temperature must be evaluated, and derated as needed, based on ambient temperature (TA), power dissipation (PD),
maximum allowable operating junction temperature (TJ(MAX)), and package thermal resistance (RθJA). See Application and
Implementation.
6.2 ESD Ratings
VALUE
UNIT
VESD
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
±2000
V
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. have higher
performance.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
NOM
MAX
UNIT
Input supply voltage
2.7
5.5
V
Enable input voltage
0
5.5
V
Output current (DC)
0
1.5
A
VOUT
0.6
5
V
Junction temperature(1)
−40
125
°C
(1)
Operating junction temperature must be evaluated, and derated as needed, based on ambient temperature (TA), power dissipation (PD),
maximum allowable operating junction temperature (TJ(MAX)), and package thermal resistance (RθJA). See Application and
Implementation.
6.4 Thermal Information
LP38500 and LP38502
THERMAL METRIC(1)
KTT(DDPAK/TO-263)
NDQ (TO-263)
NGS (WSON)
UNIT
5 PINS
5 PINS
8 PINS
RθJA
(2)
Junction-to-ambient thermal resistance
41.8
33.3
52.5(3)
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
45.0
22.1
53.6
°C/W
RθJB
Junction-to-board thermal resistance
24.8
16.9
26.1
°C/W
ψJT
Junction-to-top characterization parameter
13.1
5.8
0.6
°C/W
ψJB
Junction-to-board characterization parameter
23.8
16.8
26.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.4
2.3
7.4
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2)
Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7, High Effective Thermal
Conductivity Test Board for Leaded Surface Mount Packages.
(3)
The PCB for the NGN (WSON) package RθJA includes thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.
4
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Copyright © 2007–2015, Texas Instruments Incorporated
Product Folder Links: LP38500-ADJ LP38502-ADJ



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