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LP8754 Datasheet(PDF) 15 Page - Texas Instruments |
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LP8754 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 52 page ![]() LP8754 www.ti.com SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014 7 Detailed Description 7.1 Overview The LP8754 is a high-efficiency, high-performance power supply IC with six step-down DC-DC converter cores. It delivers 0.6 V to 1.67 V regulated voltage rail from either a single Li-Ion or three cell NiMH/NiCd batteries to portable devices such as cell phones and PDAs. There are three modes of operation for the 6-phase converter, depending on the output current required: PWM (Pulse Width Modulation), PFM (Pulse-Frequency Modulation), and Low-Power PFM. Converter operates in PWM mode at high load currents of approximately 250 mA or higher, depending on register setting. Lighter output current loads will cause the converter to automatically switch into PFM or Low-Power PFM mode for reduced current consumption and a longer battery life. Forced PWM is also available for highest transient performance. Under no-load conditions the device can be set to Standby or Shutdown. Shutdown mode turns off the device, offering the lowest current consumption (ISHDN = 0.1 µA typ.). Additional features include soft-start, undervoltage lockout, input overvoltage protection, current overload protection, thermal warning, and thermal shutdown. The modes and features can be programmed via control registers. All the registers can be accessed with both I2C serial interfaces: System serial interface and Dynamic voltage scaling (DVS) interface. Using DVS interface for dynamic voltage scaling prevents latencies if System serial interface is busy. Using DVS interface is optional; System serial interface can also be used for dynamic voltage scaling. 7.1.1 Buck Information The LP8754 has six integrated high-efficiency buck converter cores. The cores are designed for flexibility; most of the functions are programmable, thus allowing optimization of the SMPS operation for each application. The cores are bundled together to establish a multi-phase converter This is shown in Figure 24. Operating Modes: • OFF: Output is isolated from the input voltage rail in this mode. Output has an optional pull-down resistor which can be enabled with BUCK0_CTRL.RDIS_B0 bit. • PWM: Converter operates in buck configuration. Average switching frequency is constant. • PFM: Converter switches only when output voltage decreases below programmed threshold. Inductor current is discontinuous. • Low-Power PFM: This mode is similar to PFM mode, but used with lower load conditions. In this mode some of the internal blocks are turned off between the PFM pulses. Load transient response is compromised due to the wake-up time. Features: • DVS support • Automatic mode control based on the loading • Synchronous rectification • Current mode loop with PI compensator • Soft start • Power good flag with maskable interrupt • Overvoltage comparator • Phase control and spread spectrum techniques for reducing EMI • Average output current sensing (for PFM/PWM entry/exit, phase adding/shedding, and load current reporting) • Current balancing between the phases of the converter • Differential voltage sensing • Dynamic phase adding/shedding, each output being phase shifted Programmability (The following parameters can be programmed via registers): • Output voltage • Forced PWM operation • Switch current limits for high side FET • PWM/PFM mode entry and exit (based on average output current) Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: LP8754 |
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