LP8754 datasheet(18/52 Pages) TI2

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LP8754

SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014

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Features Descriptions (continued)

7.3.1.2 Transitions Between Low-Power PFM, PFM, and PWM Modes

Normal PWM-mode operation with phase-shedding can optimize efficiency at mid-to-full load, but this is usually

at the expense of light-load efficiency. The LP8754 converter operates in PWM mode at a load current of 100 to

375 mA or higher; this mode transition trip-point is set by register. Lighter load current causes the device to

automatically switch into PFM mode for reduced current consumption. By combining PFM and PWM modes in

the same regulator and providing automatic switching, high efficiency can be achieved over a wide output load

current range.

Efficiency is further enhanced when the converter enters Low-Power PFM mode. The LP8754 includes Low-

Power mode function for low-current consumption. In this mode most of the internal blocks are disabled between

the inductor current ramp up and ramp down phases to reduce the operating current. However, as a result, the

transient performance of the converter is compromised. The Low-Power mode can be enabled by control register

setting. Also, the application processor or the PMIC may provide an HW signal (NSLP) to the LP8754 input to

indicate when the processor has entered a low-power state. When the signal is asserted, the LP8754 Low-Power

PFM function will be enabled, and the LP8754 will run with a reduced input current. The right timing of the NSLP

signal from the system is important for best load-transient performance. The NSLP signal should be asserted

only when load current is stable and below 30 mA. Before the load current increases above 30 mA, the NSLP

signal should be de-asserted 100 µs (minimum) prior to a load step to prepare the converter for the higher load

current.

7.3.1.3 Buck Converter Load Current

The buck load current can be monitored via I2C registers. Current of different buck converter cores or the total

load current of the master can be selected from register 0x21 (see SEL_I_LOAD). A write to this selection

a measurement sequence starts, the FLAGS_1.I_LOAD_READY bit in register 0x0E is set to '0'. After the

measurement sequence is finished, the FLAGS_1.I_LOAD_READY bit is set to '1'. (Note that by default this bit is

'0'.) The measurement result can be read from registers 0x22 (LOAD_CURR.BUCK_LOAD_CURR[7:0]) and

0x21 (SEL_I_LOAD.BUCK_LOAD_CURR[10:8]). The measurement result [10:0] LSB is 10 mA, and the

maximum value of the measurement is 20 A. The LP8754 can be configured to give out an interrupt after the

load current measurement sequence is finished. Load current measurement interrupt can be masked with

INT_MASKS_2.MASK_I_LOAD_READY bit.

7.3.1.4 Spread Spectrum Mode

Systems with periodic switching signals may generate a large amount of switching noise in a set of narrowband

frequencies (the switching frequency and its harmonics). The usual solution to reduce noise coupling is to add

EMI-filters and shields to the boards. The LP8754's register-selectable spread spectrum mode minimizes the

need for output filters, ferrite beads, or chokes. In spread spectrum mode, the switching frequency varies

randomly around the center frequency, reducing the EMI emissions radiated by the converter, associated passive

components, and PCB traces. See Figure 10.

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