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INA300 Datasheet(PDF) 29 Page - Texas Instruments |
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INA300 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 42 page ![]() 10 Layout 10.1 Layout Guidelines • The power-supply bypass capacitor must be placed as closely as possible to the supply and ground terminals. The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added to compensate for noisy or high-impedance power supplies. • The connection of RLIMIT to the ground terminal must be made as direct as possible to limit additional capacitance on this node. Routing this connection must be limited to the same plane if possible avoiding vias to internal planes. If the routing cannot be made on the same plane and must pass through vias, ensure that a path is routed from the RLIMIT back to the ground terminal and that the RLIMIT is not connected directly to a ground plane. • The DELAY terminal must be either connected directly to ground, directly to supply, or left completely floating. Additional external resistors must not be connected to this terminal. If a resistance is required by the application to be placed in series with either the supply or ground connection to the DELAY terminal, this resistance must be limited to 1 kΩ so as to not conflict with the internal level detection circuitry. • The HYS terminal must be either connected directly to ground, directly to supply, or left completely floating. Additional external resistors must not be connected to this terminal. If a resistance is required by the application to be placed in series with either the supply or ground connections to the HYS terminal, this resistance must be limited to 1 kΩ so as to not conflict with the internal level detection circuitry. • The open-drain output pin is recommended to be pulled up to the supply voltage rail through a 10-kΩ pull-up resistor. 10.2 Layout Example Alert Signal Trace Digital Control Traces Limit Resistor Pull-Up Resistor Supply Bypass Capacitor Kelvin Connection VIA to Power or Ground Plane VIA to Internal Layer Supply Voltage VS GND LATCH EN HYS DELAY ALERT LIMIT IN- IN+ NOTE: Connect the limit resistor directly to the GND terminal. Figure 10-1. Recommended Layout for WSON Package www.ti.com INA300 SBOS613C – FEBRUARY 2014 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: INA300 |
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