DP83849IFVSSLASHNOPB datasheet(35/108 Pages) TI2

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2.2 k:

PHYAD1 = 1

PHYAD2 = 0

PHYAD3 = 0

PHYAD4 = 0

VCC

DP83849IF

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SNOSAX8D – JUNE 2009 – REVISED APRIL 2013

The DP83849IF can Auto-Negotiate or parallel detect to a specific technology depending on the receive

signal at the PMD input pair. A valid link can be established for the receiver even when the DP83849IF is

in Isolate mode.

Figure 5-1. PHYAD Strapping Example

5.5

LED INTERFACE

The DP83849IF supports three configurable Light Emitting Diode (LED) pins for each port.

Several functions can be multiplexed onto the three LEDs using three different modes of operation. The

LED operation mode can be selected by writing to the LED_CFG[1:0] register bits in the PHY Control

option on the CRS_A and CRS_B pins. LED_CFG[1] is only controllable through register access and

cannot be set by as strap pin.

See Table 5-3 for LED Mode selection.

Table 5-3. LED Mode Selection

Mode

LED_CFG[1]

LED_CFG[0]

LED_LINK

LED_SPEED

LED_ACT/LED_COL

don't care

ON for Good Link

ON in 100 Mb/s

ON for Activity

OFF for No Link

OFF in 10 Mb/s

OFF for No Activity

ON for Good Link

ON in 100 Mb/s

ON for Collision

BLINK for Activity

OFF in 10 Mb/s

OFF for No Collision

ON for Good Link

ON in 100 Mb/s

ON for Full Duplex

BLINK for Activity

OFF in 10 Mb/s

OFF for Half Duplex

The LED_LINK pin in Mode 1 indicates the link status of the port. In 100BASE-T mode, link is established

as a result of input receive amplitude compliant with the TP-PMD specifications which will result in internal

generation of signal detect. A 10 Mb/s Link is established as a result of the reception of at least seven

consecutive normal Link Pulses or the reception of a valid 10BASE-T packet. This will cause the assertion

of LED_LINK. LED_LINK will deassert in accordance with the Link Loss Timer as specified in the IEEE

802.3 specification.

The LED_LINK pin in Mode 1 will be OFF when no LINK is present.

The LED_LINK pin in Mode 2 and Mode 3 will be ON to indicate Link is good and BLINK to indicate

activity is present on activity. The BLINK frequency is defined in BLINK_FREQ, bits [7:6] of register

LEDCR (18h).

Configuration

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