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DP83849IFVS/NOPB Datasheet(PDF) 12 Page - Texas Instruments |
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DP83849IFVS/NOPB Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 108 page  DP83849IF SNOSAX8D – JUNE 2009 – REVISED APRIL 2013 www.ti.com Signal Name Type Pin # Description FX_EN_A (COL_A) S, I, PD 3 FX ENABLE: Default is to disable 100BASE-FX (Fiber) mode. This strapping option FX_EN_B (COL_B) 59 enables 100BASE-FX. An external pull-up will enable 100BASE-FX mode. Auto-Negotiation Enable: When high, this enables Auto-Negotiation with the capability AN_EN S, O, PU 21 set by AN0 and AN1 pins. When low, this puts the part into Forced Mode with the (LED_ACT/LED_COL_A) 20 capability set by AN0 and AN1 pins. AN1_A (LED_SPEED_A) 19 AN0 / AN1: These input pins control the forced or advertised operating mode of the AN0_A (LED_LINK_A) DP83849IF according to the following table. The value on these pins is set by connecting the input pins to GND (0) or VCC (1) through 2.2 kΩ resistors. These pins AN_EN 41 should NEVER be connected directly to GND or VCC. (LED_ACT/LED_COL_B) 42 Fiber Mode Duplex Selection: If Fiber mode is strapped using the FX_EN pin, the AN0 AN1_B (LED_SPEED_B) 43 strap value is used to select Half or Full Duplex. AN_EN and AN1are ignored if FX_EN AN0_B (LED_LINK_B) is asserted, since Fiber mode is 100Mb only and does not support Auto-Negotiation. The value set at this input is latched into the DP83849IF at Hardware-Reset. The float/pull-down status of these pins are latched into the Basic Mode Control Register and the Auto_Negotiation Advertisement Register during Hardware-Reset. The default is 0111 since the FX_EN pin has an internal pull-down and the Auto- Negotiation pins have internal pull-ups. FX_EN AN_EN AN1 AN0 Forced Mode 0 0 0 0 10BASE-T, Half-Duplex 0 0 0 1 10BASE-T, Full-Duplex 0 0 1 0 100BASE-TX, Half-Duplex 0 0 1 1 100BASE-TX, Full-Duplex 1 X X 0 100BASE-FX, Half-Duplex 1 X X 1 100BASE-FX, Full-Duplex FX_EN AN_EN AN1 AN0 Advertised Mode 0 1 0 0 10BASE-T, Half/Full-Duplex 0 1 0 1 100BASE-TX, Half/Full-Duplex 0 1 1 0 10BASE-T, Half-Duplex, 100BASE-TX, Half-Duplex 0 1 1 1 10BASE-T, Half/Full-Duplex, 100BASE-TX, Half/Full-Duplex MII_MODE_A (RX_DV_A) S, O, PD 80 MII MODE SELECT: This strapping option pair determines the operating mode of the SNI_MODE_A (TXD3_A) 17 MAC Data Interface. Default operation (No pull-ups) will enable normal MII Mode of MII_MODE_B (RX_DV_B) 62 operation. Strapping MII_MODE high will cause the device to be in RMII or SNI modes SNI_MODE_B (TXD3_B) 45 of operation, determined by the status of the SNI_MODE strap. Since the pins include internal pull-downs, the default values are 0. Both MAC Data Interfaces must have their RMII Mode settings the same, i.e. both in RMII mode or both not in RMII mode. The following table details the configurations: MII_MODE SNI_MODE MAC Interface Mode 0 X MII Mode 1 0 RMII Mode 1 1 10 Mb SNI Mode LED_CFG_A S, O, PU 1 LED CONFIGURATION: This strapping option determines the mode of operation of the (CRS_A/CRS_DV_A) 61 LED pins. Default is Mode 1. Mode 1 and Mode 2 can be controlled via the strap option. LED_CFG_B All modes are configurable via register access. (CRS_B/CRS_DV_B) See Table 5-3 for LED Mode Selection. MDIX_EN_A (RX_ER_A) S, O, PU 2 MDIX ENABLE: Default is to enable MDIX. This strapping option disables Auto-MDIX. MDIX_EN_B (RX_ER_B) 60 An external pull-down will disable Auto-MDIX mode. ED_EN_A (RXD3_A) S, O, PD 9 Energy Detect ENABLE: Default is to disable Energy Detect mode. This strapping ED_EN_B (RXD3_B) 53 option enables Energy Detect mode for the port. In Energy Detect mode, the device will initially be in a low-power state until detecting activity on the wire. An external pull-up will enable Energy Detect mode. CLK2MAC_DIS (RXD2_A) S, O, PD 8 Clock to MAC Disable: This strapping option disables (floats) the CLK2MAC pin. Default is to enable CLK2MAC output. An external pullup will disable (float) the CLK2MAC pin. If the system does not require the CLK2MAC signal, the CLK2MAC output should be disabled via this strap option. EXTENDER_EN (RXD2_B) S, O, PD 56 Extender Mode Enable: This strapping option enables Extender Mode for both ports. When enabled, the strap will enable Single Clock MII TX and RX modes unless RMII Mode is also strapped. SNI Mode cannot be strapped if Extender Mode is strapped. 12 Pin Descriptions Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DP83849IF |
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