OPA320-Q1

V

(V+)

V

O

V

I

R

(IN)

R

× C

= R

C

×

(IN)

(IN)

(F)

(F)

R

(F)

C

(L)

C

(IN)

C

(IN)

C

(F)

R

(S)

OPA320-Q1

V

(V+)

V

I

V

O

I

10 mA, Max

(OVERLOAD)

13

OPA320-Q1, OPA2320-Q1

www.ti.com

SLOS884B – SEPTEMBER 2014 – REVISED DECEMBER 2018

Product Folder Links: OPA320-Q1 OPA2320-Q1

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Copyright © 2014–2018, Texas Instruments Incorporated

7.3 Feature Description

7.3.1 Input and ESD Protection

The OPAx320-Q1 incorporate internal electrostatic discharge (ESD) protection circuits on all pins. In the case of

input and output pins, this protection primarily consists of current-steering diodes connected between the input

and power-supply pins. These ESD protection diodes also provide in-circuit input overdrive protection, provided

that the current is limited to 10 mA, as stated in the Absolute Maximum Ratings. Many input signals are

inherently current-limited to less than 10 mA; therefore, a limiting resistor is not required. Figure 29 shows how a

series input resistor (R(S)) may be added to the driven input to limit the input current. The added resistor

contributes thermal noise at the amplifier input and the value should be kept to the minimum in noise-sensitive

applications.

Figure 29. Input Current Protection

7.3.2 Feedback Capacitor Improves Response

For optimum settling time and stability with high-impedance feedback networks, adding a feedback capacitor

across the feedback resistor, R(FB), as shown in Figure 30 may be necessary. This capacitor compensates for the

zero created by the feedback network impedance and the OPAx320-Q1 input capacitance (and any parasitic

layout capacitance). The effect becomes more significant with higher impedance networks.

NOTE: Where C(IN) is equal to the OPAx320-Q1 input capacitance (approximately 9 pF) plus any parasitic layout

capacitance.

Figure 30. Feedback Capacitor Improves Dynamic Performance

It is suggested that a variable capacitor be used for the feedback capacitor because input capacitance may vary

between op amps and layout capacitance is difficult to determine. For the circuit shown in Figure 30, the value of

the variable feedback capacitor should be chosen so that the input resistance times the input capacitance of the

OPAx320-Q1 (9 pF, typical) plus the estimated parasitic layout capacitance equals the feedback capacitor times

the feedback resistor:

R(IN) × C(IN) = R(FB) × C(FB)

Where:

•

C(IN) is equal to the OPAx320-Q1 input capacitance (sum of differential and common-mode) plus the layout

capacitance.

(1)

The capacitor value can be adjusted until optimum performance is obtained.