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DRV7167 Datasheet(PDF) 9 Page - Texas Instruments |
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DRV7167 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 28 page ![]() Unless otherwise noted, voltages are with respect to AGND and typical specifications are at 25 ℃ (1); -40℃ ≤ TJ ≤150℃ PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tHIPHL Propagation delay: HI Falling(2) LI=0V, GVDD=5V, BOOT-HS=5V, VM=48V 15 25 ns tLIPLH Propagation delay: LI Rising(2) HI=0V, GVDD=5V, BOOT-HS=5V, VM=48V 15 25 ns tLIPHL Propagation delay: LI Falling(2) HI=0V, GVDD=5V, BOOT-HS=5V, VM=48V 15 25 ns tMON Delay Matching: LI high & HI low(2) 2 5 ns tMOFF Delay Matching: LI low & HI high(2) 2 5 ns tPW Minimum Input Pulse Width that Changes the Output 10 ns INPUT PINS (ENIN/HI, PWM/LI, EN) VIH High-Level Input Voltage Threshold Rising Edge 2.1 V VIL Low-Level Input Voltage Threshold Falling Edge 1.2 V VHYS Hysteresis between rising and falling threshold 300 mV RI Input pull down resistance 200 300 500 kΩ OUTPUT PINS (ZVDx) VOL Low level output voltage IOL = 3 mA 0.25 V VOH High level output voltage IOL = -1.5 mA to 0 mA 2.6 3.5 V UNDER/OVER VOLTAGE PROTECTION VGVDDR VGVDD Rising edge threshold Rising 3.3 3.6 3.9 V VGVDDF VGVDD Falling edge threshold 3.1 3.4 3.7 V VGVDD(hyst) VGVDD UVLO threshold hysteresis 200 mV VBOOTR BOOT Rising edge threshold Rising 3.3 3.6 3.9 V VBOOTF BOOT Falling edge threshold 3.1 3.4 3.7 V VBOOT(hyst) BOOT UVLO threshold hysteresis 200 mV VBOOTth BOOT Regulation Voltage thresholds 4.5 5.3 V tPWRUP Power Up time after Digital Reset 50 µs SYNCRONOUS BOOTSTRAP VDH Forward voltage drop IVDD-BOOT = 5mA 40 mV IVDD-BOOT = 50mA 400 mV tSS BOOT power up time (With LI=High) CBOOT = 220 nF 2.2 µs tSS BOOT power up time (With LI=High) CBOOT = 1 µF 10 µs SUPPLY CURRENTS IGVDD GVDD Quiescent Current LI = HI = 0V, GVDD = 5V, EN=0 0.3 mA IGVDD GVDD Quiescent Current LI = HI = 0V, GVDD = 5V 0.9 3.5 mA IGVDD GVDD Quiescent Current LI=GVDD=5V, HI=0V 1.8 7 mA IGVDDO Total GVDD Operating Current f = 500 kHz, 50% Duty cycle, VM = 48V 12 15 mA IBOOT BOOT Quiescent Current LI = HI = 0V, GVDD = 5V, BOOT-HS = 5V 0.5 1 mA IBOOT BOOT Quiescent Current LI=0V, HI=GVDD=5V, BOOT-HS=5V, VM=48V 0.8 3.5 mA IBOOTO BOOT Operating Current f = 500 kHz, 50% Duty cycle, GVDD = 5V, BOOT-HS = 5V, VM = 48V 5.6 8 mA SLEW RATE CONTROL (EFFECTIVE GATE RESISTANCE) Rgfh RDHF = 0 Ω Voltage across driver FET = 1.2V 0.3 Ω RDHF = 4 kΩ 1.3 RDHF = 8 kΩ 2.6 RDHF =16 kΩ 5.3 Rgfl RDLF = 0 Ω Voltage across driver FET = 1.2V 0.3 Ω RDLF = 4 kΩ 1.3 RDLF = 8 kΩ 2.6 RDLF =16 kΩ 5.3 www.ti.com DRV7167 SLVSJF0 – OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: DRV7167 |
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