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DRV7167 Datasheet(PDF) 11 Page - Texas Instruments |
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DRV7167 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 28 page ![]() 6 Parameter Measurement Information 6.1 Propagation Delay and Mismatch Measurement Figure 6-1 shows the typical test setup used to measure the propagation mismatch. As the gate drives are not accessible, pullup and pulldown resistors in this test circuit are used to indicate when the low-side GaN FET turns ON and the high-side GaN FET turns OFF and vice versa to measure the tMON and tMOFF parameters. Resistance values used in this circuit for the pullup and pulldown resistors are in the order of 1 kΩ; the current sources used are 2 A. Figure 6-2 through Figure 6-5 show propagation delay measurement waveforms. For turnon propagation delay measurements, the current sources are not used. For turnoff time measurements, the current sources are set to 2 A, and a voltage clamp limit is also set, referred to as VM(CLAMP). When measuring the high-side component turnoff delay, the current source across the high-side FET is turned on, the current source across the low-side FET is off, HI transitions from high-to-low, and output voltage transitions from VM to VM(CLAMP). Similarly, for low-side component turnoff propagation delay measurements, the high-side component current source is turned off, and the low-side component current source is turned on, LI transitions from high to low and the output transitions from GND potential to VM(CLAMP). The time between the transition of LI and the output change is the propagation delay time. OUT PGND VM HI LI HS BOOT GVDD AGND DRV716x Pattern Generator VOUT Delay Measurement Figure 6-1. Propagation Delay and Propagation Mismatch Measurement www.ti.com DRV7167 SLVSJF0 – OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: DRV7167 |
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