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PCM1753 Datasheet(PDF) 16 Page - Texas Instruments

Part # PCM1753
Description  PCM175x 24-Bit, 192-kHz Sampling, Enhanced Multilevel, Delta-Sigma, Audio, Digital-to-Analog Converter
PDF  41 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

PCM1753 Datasheet(HTML) 16 Page - Texas Instruments

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PCM1753, PCM1754, PCM1755
SLES092E – APRIL 2003 – REVISED JULY 2019
www.ti.com
Product Folder Links: PCM1753 PCM1754 PCM1755
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Copyright © 2003–2019, Texas Instruments Incorporated
8.3.3 Zero Flag (PCM1754)
The PCM1754 device has a ZERO flag pin, ZEROA (pin 11). ZEROA is the L-channel and R-channel common
zero flag pin. If the data for L-channel and R-channel remains at a 0 level for 1024 sampling periods (or LRCK
clock periods), ZEROA is set to a logic 1 state.
8.3.4 Zero Flag (PCM1753)
Zero-Detect Condition
Zero detection for either output channel is independent from the other channel. If the data for a given channel
remains at a 0 level for 1024 sample periods (or LRCK clock periods), a zero-detect condition exists for that
channel.
8.3.5 Zero Flag Outputs
If a zero-detect condition exists for one or more channels, the zero flag pins for those channels are set to a logic
1 state. There are zero flag pins for each channel, ZEROL (pin 12) and ZEROR (pin 11). These pins can be used
to operate external mute circuits, or used as status indicators for a microcontroller, audio signal processor, or
other digitally controlled function. The active polarity of zero flag outputs can be inverted by setting the ZREV bit
of control register 22 to 1. The reset default is active-high output, or ZREV = 0. The L-channel and R-channel
common zero flag can be selected by setting the AZRO bit of control register 22 to 1. The reset default is
independent zero flags for L-channel and R-channel, or AZRO = 0.
8.3.6 Analog Outputs
The PCM1753 device includes two independent output channels, VOUTL and VOUTR. These are unbalanced
outputs, each capable of driving 4 VPP typical into a 5-kΩ ac-coupled load. The internal output amplifiers for
VOUTL and VOUTR are biased to the dc common-mode (or bipolar zero) voltage, equal to 0.5 VCC.
The output amplifiers include an RC continuous-time filter, which helps to reduce the out-of-band noise energy
present at the DAC outputs due to the noise shaping characteristics of the PCM1754 delta-sigma D/A converters.
The frequency response of this filter is shown in Figure 24. By itself, this filter is not enough to attenuate the out-
of-band noise to an acceptable level for many applications. An external low-pass filter is required to provide
sufficient out-of-band noise rejection. Further discussion of DAC post-filter circuits is provided in the Applications
Information section of this data sheet.
Figure 24. Output Filter Frequency Response



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