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PCM1840 Datasheet(PDF) 9 Page - Texas Instruments

Part # PCM1840
Description  PCM1840 Quad Channel, 32-Bit, 192-kHz, Burr-BrownTM Audio ADC
PDF  41 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

PCM1840 Datasheet(HTML) 9 Page - Texas Instruments

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Frequency (Hz)
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ADC6
Channel-1 : DRE enabled
Channel-2 : DRE enabled
Channel-3 : DRE enabled
Channel-4 : DRE enabled
Frequency (Hz)
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ADC6
Channel-1 : DRE disabled
Channel-2 : DRE disabled
Channel-3 : DRE disabled
Channel-4 : DRE disabled
Frequency (Hz)
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0
ADC6
Channel-1 : DRE enabled
Channel-2 : DRE enabled
Channel-3 : DRE enabled
Channel-4 : DRE enabled
Frequency (Hz)
20
50
100
500
1000
5000
10000
20000
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
ADC6
Channel-1 : DRE disabled
Channel-2 : DRE disabled
Channel-3 : DRE disabled
Channel-4 : DRE disabled
Frequency (Hz)
20
50
100
500
1000
5000
10000
20000
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
ADC6
Channel-1 : DRE enabled
Channel-2 : DRE enabled
Channel-3 : DRE enabled
Channel-4 : DRE enabled
Frequency (Hz)
20
50
100
500
1000
5000
10000
20000
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
ADC6
Channel-1 : DRE disabled
Channel-2 : DRE disabled
Channel-3 : DRE disabled
Channel-4 : DRE disabled
9
PCM1840
www.ti.com
SBAS989 – APRIL 2019
Product Folder Links: PCM1840
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Typical Characteristics (continued)
at TA = 25°C, AVDD = 3.3 V, IOVDD = 3.3 V, fIN = 1-kHz sinusoidal signal, fS = 48 kHz, 32-bit audio data, BCLK = 256 × fS,
TDM slave mode, PLL on, DRE_LVL = –36 dB, channel gain = 0 dB, and linear phase decimation filter (unless otherwise
noted); all performance measurements are done with a 20-kHz, low-pass filter, and an A-weighted filter
Figure 8. FFT With Idle Input With DRE Enabled
Figure 9. FFT With Idle Input With DRE Disabled
Figure 10. FFT With a –60-dBr Input With DRE Enabled
Figure 11. FFT With a –60-dBr Input With DRE Disabled
Figure 12. FFT With a –1-dBr Input With DRE Enabled
Figure 13. FFT With a –1-dBr Input With DRE Disabled



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