L99DZ320 datasheet(105/146 Pages) STMICROELECTRONICS

105 / 146 page

6.4.5

Control register 5-9 (from CR5 to CR9, [0x32, 0x36])

Table 84. Control register 5-9

Bit

name

Reset

value

Access

Table 85. From CR5 to CR9 signals description

Bit

Name

Description

23:22

RESERVED -

PWMx_DC_9

Binary coded on duty cycle of PWM channel PWMx (x = 9, 7, 5, 3, 1)

(see Table 86. Duty cycle coding for channel PWMx(y))

PWMx_DC_8

PWMx_DC_7

PWMx_DC_6

PWMx_DC_5

PWMx_DC_4

PWMx_DC_3

Binary coded on duty cycle of PWM channel PWMx (x = 9, 7, 5, 3, 1)

(see Table 86. Duty cycle coding for channel PWMx(y))

PWMx_DC_2

PWMx_DC_1

PWMx_DC_0

11:10

RESERVED -

PWMy_DC_9 Binary coded on duty cycle of PWM channel PWMy (y = x + 1)

(see Table 86. Duty cycle coding for channel PWMx(y))

PWMy_DC_8

PWMy_DC_7

Binary coded on duty cycle of PWM channel PWMy (y = x + 1) (see Table 86. Duty cycle coding for channel

PWMx(y))

PWMy_DC_6

PWMy_DC_5

PWMy_DC_4

PWMy_DC_3

PWMy_DC_2

PWMy_DC_1

PWMy_DC_0

L99DZ320

SPI Registers

DS14235 - Rev 5

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