(SMBus 8-bit address 0xA0). When the TDP2004-Q1 has finished reading from the EEPROM successfully, the

device drives the DONEn pin LOW. SMBus/I2C Target operation is available in this mode before, during, or

after EEPROM reading. Note: during EEPROM reading, if the external SMBus/I2C Controller wants to access

TDP2004-Q1 registers, the external controller must support arbitration.

When designing a system for using the external EEPROM, the user must follow these specific guidelines:

• EEPROM size of 2Kb (256 × 8-bit) is recommended.

• Set MODE = L1, configure for SMBus Controller mode.

• The external EEPROM device address byte must be 0xA0 and capable of 400kHz operation at 3.3V supply

• In SMBus/I2C modes the SCL and SDA pins must be pulled up to a 3.3V supply with a pullup resistor.

The value of the resistor depends on total bus capacitance. 4.7kΩ is a good first approximation for a bus

capacitance of 10pF.

Multiple TDP2004-Q1 can be cascaded to read from single EEPROM. Tie the READ_ENn pin of the first device

low (GND) to automatically initiate EEPROM read at power up. DONEn of the first device can be fed into

READ_ENn of the next device with 4.7kΩ pullup resistors. Leave the DONEn pin of the final device floating, or

connect the pin to a micro-controller input to monitor the completion of the final EEPROM read.

TDP2004-Q1

SNLS787 – SEPTEMBER 2025

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