7.4 Layout

7.4.1 Layout Guidelines

Refer to following guidelines when designing the layout of the system implementation:

1. Place the decoupling capacitors as close to the VCC pins as possible. Placing the decoupling capacitors

directly underneath the device is recommended if the board design permits.

2. Make sure the high-speed differential signals TXnP/TXnN and RXnP/RXnN are tightly coupled, skew

matched, and impedance controlled.

3. Avoid vias when possible on the high-speed differential signals. When vias must be used, take care to

minimize the via stub, either by transitioning through most or all layers or by back drilling.

4. GND relief can be used (but is not required) beneath the high-speed differential signal pads to improve

signal integrity by counteracting the pad capacitance.

5. Place GND vias directly beneath the device connecting the GND plane attached to the device to the GND

planes on other layers. This has the added benefit of improving thermal conductivity from the device to the

board.

6. Refer to land pattern example in the mechanical drawing section for the device thermal pad design

recommendation.

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TDP2004-Q1

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