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TDP2004 Datasheet(PDF) 14 Page - Texas Instruments |
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TDP2004 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 34 page ![]() Table 6-2. Flat Gain Configuration Settings (continued) Pin mode: GAIN I2C Mode: flat_gain_2:0 Datapath Flat Gain L3 7 +2.6dB 6.3.3 Cross Point The TDP2004-Q1 provides 2x2 cross-point function. Using pin SEL pin the 4 channel signal paths can be configured as straight connection or cross connections as shown in Figure 6-1. RX0 RX1 TX0 TX1 RX2 RX3 TX2 TX3 SEL=L (Ch 0-3) RX0 RX1 TX0 TX1 RX2 RX3 TX2 TX3 SEL=H (Ch 0-3) Figure 6-1. Signal Flow Diagram for Cross-Point Mux Operation 6.4 Device Functional Modes 6.4.1 Active Mode The device is in normal operation. In this mode, the TDP2004-Q1 redrives and equalizes video mainlink signals to provide better signal integrity. 6.4.2 Standby Mode The device is in standby mode invoked by PD = H. In this mode, the device is in standby mode conserving power. 6.5 Programming 6.5.1 Pin mode The TDP2004-Q1 can be fully configured through pin-strap pins. In this mode the device uses 2-level and 5-level pins for device control and signal integrity optimum settings. 6.5.1.1 Five-Level Control Inputs The TDP2004-Q1 has 5-level input pins that are used to control the configuration of the device. These 5-level inputs use a resistor divider to help set the 5 valid levels and provide a wider range of control settings. External resistors must be of 10% tolerance or better. The 5-level pins except MODE are sampled at powerup only. The MODE pin can be exercised at device power up or in normal operation mode. Table 6-3. 5-Level Control Pin Settings LEVEL SETTING L0 1kΩ to GND L1 8.25kΩ to GND L2 24.9kΩ to GND L3 75kΩ to GND L4 F (Float) TDP2004-Q1 SNLS787 – SEPTEMBER 2025 www.ti.com 14 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TDP2004-Q1 |
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