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LC320DXN Datasheet(PDF) 33 Page - LG Semicon Co.,Ltd. |
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LC320DXN Datasheet(HTML) 33 Page - LG Semicon Co.,Ltd. |
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33 / 36 page ![]() Product Specification LC320DXN Ver. 1.0 33 / 36 # APPENDIX-III-1 ■ Required signal assignment for Flat Link Transmitter(Pin9=“L” or NC) RED0 RED1 RED2 RED3 RED4 RED5 RED6 RED7 GREEN0 GREEN1 GREEN2 GREEN3 GREEN4 GREEN5 GREEN6 GREEN7 BLUE0 BLUE1 BLUE2 BLUE3 BLUE4 BLUE5 BLUE6 BLUE7 Hsync Vsync Data Enable CLOCK Host System 24 Bit TxOUT0- TxOUT0+ TxOUT1- TxOUT1+ TxOUT2- TxOUT2+ TxCLKOUT- TxCLKOUT+ TxOUT3- TxOUT3+ 51 52 54 55 56 3 50 2 4 6 7 11 12 14 8 10 15 19 20 22 23 24 16 18 27 28 30 31 DS90C385 or Compatible 12 13 15 16 18 19 21 22 24 25 9 RxIN0- RxIN0+ RxIN1- RxIN1+ RxIN2- RxIN2+ RxCLKIN- RxCLKIN+ RxIN3- RxIN3+ VESA / JEIDA 100 Ω 100 Ω 100 Ω 100 Ω 100 Ω 48 47 46 45 42 41 40 39 38 37 KDF71G-30S-1H Timing Controller LCD Module Notes: 1. The LCD module uses a 100 Ohm(Ω) resistor between positive and negative lines of each receiver input. 2. Refer to LVDS transmitter data sheet for detail descriptions. (DS90C385 or Compatible) 3. ‘7’ means MSB and ‘0’ means LSB at R,G,B pixel data. |
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