LT3045 datasheet(30/45 Pages) AD

30 / 45 page

Data Sheet

LT83201

analog.com

Rev. A 30 of 45

Output Voltages Above 13V

The LT83201 can be configured for output voltages above 13V, even though the SET pin voltage is limited to a

maximum of 13V, by using a traditional resistor divider from VOUT to OUTS, as shown in Figure 55. It is recommended

to configure the SET pin voltage to be 12V, in which case the resistor values can be chosen according to Equation 9.

R1 = R2 ∙ (

VOUT − 12V

12V + R2 × IOUTS

)

(9)

The OUTS pin current is 160nA ±80nA per the Electrical Characteristics table. The divider values R1 and R2 can be

chosen such that this OUTS pin current variation introduces <0.1% error in output voltage regulation. The thermal

noise of the resistors in the resistor divider also adds to the output noise. It is recommended to choose the resistor

values such that their impedance as viewed from the SET pin (R1||R2) is less than 5kΩ to keep their noise contribution

low compared to the noise contribution of the part itself.

Figure 55. Configuring the LT83201 for Output Voltages above 13V

At output voltages above 13V, the low frequency noise has some dependence on the output voltage, the divider gains

up the noise. By configuring the SET voltage to be 12V, this dependency is minimized, for example, the noise gain

from a 12V reference to 15VOUT is 24 times lower than the gain from a conventional 0.5V voltage reference to 15VOUT.

Output Voltages Below 0.5V

Due to the current reference architecture, the LT83201 can be configured for output voltages below 0.5V all the way

down to 0V. It should be noted that for output voltages below 0.5V, the Power Good and Fast Start-Up functionalities

are not available, and these functionalities must be disabled correctly by tying PGFB to INTVCC or to 0.5V.

Output Sensing and Stability

The LT83201’s OUTS pin provides a Kelvin sense connection to the output. The SET pin resistor’s GND side provides

a Kelvin sense connection to the load’s GND side.

The LT83201’s internal error amplifier has a relatively high voltage gain of ~2800. Therefore, it is important to avoid

adding extra impedance (ESR and ESL) to the feedback loop and to minimize the noise coupling onto the OUTS pin,

as a combination of excessive parasitics and noise injection can cause instability in the system. To that end, minimize

the effects of PCB trace and solder inductance by tying the OUTS pin directly to COUT and the GND side of CSET directly

to the GND side of COUT. If this is not possible, for example, due to a design requiring remote sensing, a small local

OUTS capacitor of 150pF or less may be added for noise decoupling at the OUTS pin. For more information on the

recommended layout that meets these requirements, refer to the LT83201 demo board manual.

The LT83201 is an externally compensated part, so even if the recommended layout is not followed (sometimes it is

not possible due to application-specific limitations), it is possible to choose a more conservative compensation with

a lower gain or bandwidth in order to retain stability during operation. However, this is at the expense of a transient

response. A superior layout allows a better tradeoff between transient response, phase margin, and output noise

performance when selecting compensation values.

RSET

CSET

OUTS

LT83201

VOUT

SET

GND

CPL

COUT

LT3045 Datasheet(PDF) 30 Page - Analog Devices

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