DM505LRBABF datasheet(270/295 Pages) TI2

Part #	DM505LRBABF

Description	DM505 SoC for Vision Analytics 15mm Package (ABF) Silicon Revision 2.0

PDF	295 Pages

Scroll/Zoom	100%

Manufacturer	TI2 [Texas Instruments]

Direct Link	https://www.ti.com

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270 / 295 page

Rtt

Vtt

SPRS91v_PCB_DDR3_11

Rcp

Cac

DDR_1V5

0.1 µF

SPRS91v_PCB_DDR3_10

270

DM505

SPRS976E – NOVEMBER 2016 – REVISED MAY 2018

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Applications, Implementation, and Layout

Figure 7-53. CK Routing for Two Mirrored DDR3 Devices

Figure 7-54. ADDR_CTRL Routing for Two Mirrored DDR3 Devices

7.9.2.13.2 Two DDR3 Devices

Two DDR3 devices are supported on the DDR EMIF consisting of two x8 DDR3 devices arranged as one

bank (CS), 16 bits wide, or two x16 DDR3 devices arranged as one bank (CS), 32 bits wide. These two

devices may be mounted on a single side of the PCB, or may be mirrored in a pair to save board space at

a cost of increased routing complexity and parts on the backside of the PCB.

7.9.2.13.2.1 CK and ADDR_CTRL Topologies, Two DDR3 Devices

Figure 7-55 shows the topology of the CK net classes and Figure 7-56 shows the topology for the

corresponding ADDR_CTRL net classes.

DM505LRBABF Datasheet(PDF) 270 Page - Texas Instruments