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TDA2SA Datasheet(PDF) 292 Page - Texas Instruments

Part # TDA2SA
Description  TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0
PDF  427 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TDA2SA Datasheet(HTML) 292 Page - Texas Instruments

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REF_CLK (PRCM)
RMII5
RMII6
rmiin_rxd1−
rmin_rxer
rmiin_rxd0,
rmiin_crs,
(inputs)
SPRS8xx_GMAC_RMIIRX_05
RMII1
RMII3
RMII2
RMII4
292
TDA2SX, TDA2SG, TDA2SA
TDA2HG, TDA2HV, TDA2HF, TDA2LF
SPRS951F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF
Timing Requirements and Switching Characteristics
Copyright © 2015–2019, Texas Instruments Incorporated
7.21.3 GMAC RMII Timings
The main reference clock REF_CLK (RMII_50MHZ_CLK) of RMII interface is internally supplied from
PRCM. The source of this clock could be either externally sourced from the RMII_MHZ_50_CLK pin of the
device or internally generated from DPLL_GMAC output clock GMAC_RMII_HS_CLK. Please see the
PRCM chapter of the device TRM for full details about RMII reference clock.
CAUTION
The IO Timings provided in this section are only valid for some GMAC usage
modes when the corresponding Virtual IO Timings or Manual IO Timings are
configured as described in the tables found in this section.
Table 7-75, Table 7-76 and Figure 7-50 present timing requirements for GMAC RMIIn Receive.
Table 7-75. Timing Requirements for GMAC REF_CLK - RMII Operation
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
RMII1
tc(REF_CLK)
Cycle time, REF_CLK
20
ns
RMII2
tw(REF_CLKH)
Pulse duration, REF_CLK high
7
13
ns
RMII3
tw(REF_CLKL)
Pulse duration, REF_CLK low
7
13
ns
RMII4
ttt(REF_CLK)
Transistion time, REF_CLK
3
ns
Table 7-76. Timing Requirements for GMAC RMIIn Receive
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
RMII5
tsu(RXD-REF_CLK)
Setup time, receive selected signals valid before REF_CLK
4
ns
tsu(CRS_DV-REF_CLK)
tsu(RX_ER-REF_CLK)
RMII6
th(REF_CLK-RXD)
Hold time, receive selected signals valid after REF_CLK
2
ns
th(REF_CLK-CRS_DV)
th(REF_CLK-RX_ER)
Figure 7-50. GMAC Receive Interface Timing RMIIn operation
Table 7-77, Table 7-77 and Figure 7-51 present switching characteristics
for GMAC RMIIn Transmit 10/100Mbit/s.
Table 7-77. Switching Characteristics Over Recommended Operating Conditions for GMAC REF_CLK -
RMII Operation
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
RMII7
tc(REF_CLK)
Cycle time, REF_CLK
20
ns
RMII8
tw(REF_CLKH)
Pulse duration, REF_CLK high
7
13
ns



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