ADV7182 datasheet(69/96 Pages) AD

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Data Sheet

ADV7182

Main Map

Bits

(Shading Indicates Default State)

Comments

Notes

Subaddress

Bit Description

0x04

Extended

output control

Range; allows the user to select

the range of output values; can

be ITU-R BT.656 compliant or can

fill the whole accessible number

range

16 ≤ Y ≤ 235, 16 ≤ C/P ≤ 240

ITU-R BT.656

1 ≤ Y ≤ 254, 1 ≤ C/P ≤ 254

Extended range

EN_SFL_PIN

Disables SFL output

SFL output enables

encoder and decoder

to be connected

directly

Outputs SFL information on the

SFL pin

BL_C_VBI; blank chroma during

VBI; if set, it enables data in the

VBI region to be passed

through the decoder

undistorted

Decode and output color during

VBI

during VBI

Blank Cr and Cb values during

VBI

TIM_OE; enables timing signals

output

HS, VS, FIELD tristated

Controlled by TOD

HS, VS, FIELD forced active

Reserved

BT.656-4; allows the user to select

an output mode compatible

with ITU-R BT.656-3/-4

ITU-R BT.656-3 compatible

ITU-R BT.656-4 compatible

0x07

Autodetect

enable

AD_PAL_EN; PAL B/PAL D/PAL I/

PAL G/PAL H autodetect enable

Disables

Enables

AD_NTSC_EN; NTSC autodetect

enable

Disables

Enables

AD_PALM_EN; PAL M

autodetect enable

Disables

Enables

AD_PALN_EN; PAL N

autodetect enable

Disables

Enables

AD_P60_EN; PAL 60 autodetect

enable

Disables

Enables

AD_N443_EN; NTSC 4.43

autodetect enable

Disables

Enables

AD_SECAM_EN; SECAM

autodetect enable

Disables

Enables

AD_SEC525_EN; SECAM 525

autodetect enable

Disables

Enables

0x08

Contrast

CON[7:0]; contrast adjust; this is

the user control for contrast

adjustment

Luma gain = 1

0x00 gain = 0,

0x80 gain = 1,

0xFF gain = 2

0x0A

Brightness

Adjust

BRI[7:0]; this register controls

the brightness of the video signal

0x00 = 0 IRE,

0x7F = +30 IRE,

0x80 = −30 IRE

0x0B

Hue Adjust

HUE[7:0]; this register contains

the value for the color hue

adjustment

Hue range = −90° to

+90°

0x0C

Default Value Y

DEF_VAL_EN; default value

enable

Free-run mode dependent

on DEF_VAL_AUTO_EN

Forces free-run mode on

DEF_VAL_AUTO_EN; default

value automatic enable

Disables free-run mode

When lock is lost, free-

run mode can be

enabled to output

stable timing, clock,

and a set color

Enables automatic free-run mode

DEF_Y[5:0]; default value is Y; this

Y[7:0] = {DEF_Y[5:0], 0, 0}

Default Y value output

in free-run mode

0x0D

Default

Value C

DEF_C[7:0]; default value is C;

the Cr and Cb default values are

defined in this register

Cr[3:0] = {DEF_C[7:4]},

Cb[3:0] = {DEF_C[3:0]}

Default Cb/Cr value

output in free-run

mode; default values

give blue screen

output

| Page 69 of 96

Rev. C

ADV7182 Datasheet(PDF) 69 Page - Analog Devices

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