ADV7182 datasheet(13/96 Pages) AD

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Data Sheet

ADV7182

Rev. C | Page 13 of 96

INPUT NETWORKS

This section describes the input networks (external resistor and

capacitor circuits) that should be placed on the analog video

input (AIN) pins of the ADV7182. Different input networks are

required for different analog input video formats.

SINGLE-ENDED INPUT NETWORK

Use the input network described in Figure 6 on each AIN input

pin of the ADV7182 when any of the following video input

formats are used: single-ended CVBS, YC (S-Video), or YPrPb.

It is recommended that the input network circuit shown in

Figure 6 be placed as close as possible to the AIN pins of the

ADV7182.

Figure 6. Input Single-Ended Network

The 24 Ω and 51 Ω resistors supply the 75 Ω end termination

required for the analog video input. In addition, these resistors

create a resistor divider with a 0.68 gain that attenuates the

amplitude of the inputted analog video and scales the input to the

ADC range of the ADV7182. This allows the ADV7182 to have

an input range of up to 1.47 V p-p.

Note that amplifiers within the ADV7182 restore the amplitude

of the input signal so that signal-to-noise (SNR) performance is

maintained.

The 100 nF ac coupling capacitor removes the dc bias of the analog

input video before it is fed into the analog input pins of the

ADV7182.

The clamping circuitry within the ADV7182 restores the dc bias

of the input signal to the optimal level before it is fed into the

ADC of the ADV7182. See the Clamp Operation section for

more information.

DIFFERENTIAL INPUT NETWORK

Use the input network described in Figure 7 when differential

CVBS video is input on the AIN input pins of the ADV7182.

It is recommended that the input network circuit shown in

Figure 7 be placed as close as possible to the AIN pins of the

ADV7182.

Figure 7. Input Differential Network

Differential video transmission involves transmitting two

complementary CVBS signals. It has several key advantages

over single-ended transmission, some of which include the

following:



Inherent small signal and large signal noise rejection



Improved EMI performance



Ability to absorb ground bounce

Resistor R1 provides the RF end termination for the differential

CVBS input lines. For a pseudo differential CVBS input, a value

of 75 Ω is recommended for R1. For a fully differential CVBS

input, a value of 150 Ω is recommended for R1.

The 1.3 kΩ and 430 Ω resistors provide a resistor divider with a

0.25 gain. This results in an attenuation of the inputted analog

video but also an increase in the input common-mode range of

the ADV7182 of up to 4 V p-p.

Note that amplifiers within the ADV7182 restore the amplitude

of the input signal so that SNR performance is maintained.

The 100 nF ac coupling capacitor removes the dc bias of the

analog input video before it is fed into the analog video input

pins of the ADV7182.

The clamping circuitry within the ADV7182 restores the dc bias of

the optimized level before it is fed into the ADC of the ADV7182.

See the Clamp Operation section for further information.

The combination of the 1.3 kΩ and 430 Ω resistors and the 100 nF

ac coupling capacitor limits current flow into the ADV7182

during short-to-battery (STB) events. See Short-to-Battery

Protection section.

To achieve optimal performance, closely match the 1.3 kΩ and

430 Ω resistors; that is, all the 1.3 kΩ and 430 Ω resistors should

have the same resistance tolerance, and this tolerance should be

as low as possible.

SHORT-TO-BATTERY PROTECTION

In differential mode, the ADV7182 is protected against short-to-

battery (STB) events by the external 100 nF ac coupling capacitors

(see Figure 7). The external input network resistors are sized to

be large enough to reduce the current flow during a STB event,

but to be small enough not to effect the operation of the ADV7182.

Choose the power rating of the input network resistors to

withstand the high voltages of STB events. Similarly, choose the

breakdown voltage of the AC coupling capacitors to be robust

to STB events.

The R1 resistor is protected because no current or limited

current flows through it during an STB event.

51Ω

AIN3 OF ADV7182

INPUT

CONNECTOR

VIDEO INPUT

FROM UNIT

24Ω

100nF

EXT

ESD

AIN1

AIN2

POSITIVE INPUT

CONNECTOR

NEGATIVE INPUT

CONNECTOR

VIDEO INPUT

FROM SOURCE

EXT

ESD

1.3kΩ

100nF

1.3kΩ

100nF

430Ω

ADV7182 Datasheet(PDF) 13 Page - Analog Devices

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