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DAC39RF10 Datasheet(PDF) 143 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 143 Page - Texas Instruments |
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143 / 232 page  Table 8-8. SYSREF_CTRL Register Field Descriptions (continued) Bit Field Type Reset Description 5 SYSREF_PS_EN R/W 0b When set, SYSREF_POS will contain 1’s for all positions that have been detected as near the SYSREF edge since this bit was set. When cleared, SYSREF_POS will only contain 1’s for the last SYSREF edge that was detected. 4 SYSREF_ZOOM R/W 0b Set this bit to “zoom” in the SYSREF strobe status (impacts SYSREF_POS and the step size of SYSREF_SEL). 3-0 SYSREF_SEL R/W 0b Set this field to select which SYSREF delay to use. Set this based on the results returned by SYSREF_POS. 8.8 SYSREF_POS Register (Offset = 90h) [reset = NA] SYSREF_POS is shown in Figure 8-8 and described in Table 8-9. Return to the Register Summary Table. SYSREF Position Capture Figure 8-8. SYSREF_POS Register 23 22 21 20 19 18 17 16 RESERVED SYSREF_POS R R 15 14 13 12 11 10 9 8 SYSREF_POS R 7 6 5 4 3 2 1 0 SYSREF_POS R Table 8-9. SYSREF_POS Register Field Descriptions Bit Field Type Reset Description 23-20 Reserved R 0x0 Reserved 19-0 SYSREF_POS R NA Returns a 20-bit status value that indicates the position of the SYSREF edge with respect to CLK. Use this to determine the proper programming for SYSREF_SEL, and SYSREF_ZOOM. 8.9 SYSREF_ALIGN Register (Offset = 00A0h) [reset = 00h] SYSREF_ALIGN is shown in Figure 8-9 and described in Table 8-10. Return to the Register Summary Table. SYSREF Alignment Control Figure 8-9. SYSREF_ALIGN Register 7 6 5 4 3 2 1 0 RESERVED SYSREF_ALIGN_EN R/W-00h R/W-0b Table 8-10. SYSREF_ALIGN Register Field Descriptions Bit Field Type Reset Description 7-1 RESERVED R/W 00h Reserved www.ti.com DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 143 Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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